Patents by Inventor Chung-hsing Kuo
Chung-hsing Kuo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240097239Abstract: Exemplary traction battery pack designs for use in electrified vehicles may include a thermal insulating joint configured to isolate a heat transfer path at one or more structural connections between an enclosure tray and a battery internal structure (e.g., heat exchanger plate, cross member, etc.) of the traction battery pack. The thermal insulating joint may include a first thermal insulation component and a second thermal insulation component disposed on opposite sides of the battery internal structure. The thermal insulation components cooperate to block the heat transfer path across the structural connection, thereby insulating the battery internals from an ambient surrounding of the traction battery pack.Type: ApplicationFiled: September 16, 2022Publication date: March 21, 2024Inventors: Chung-Hsing KUO, Yongcai WANG
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Patent number: 11912123Abstract: A traction battery pack venting system includes a plurality of battery arrays within a traction battery pack. The battery arrays each have a plurality of individual battery cells. The system further includes a divider system that provides a plurality of vented gas receiving compartments. Each of the vented gas receiving compartments are separate and distinct from the other vented gas receiving compartments within the plurality of vented gas receiving compartments. Each of the vented gas receiving compartments are associated with one of the battery arrays. Each of the vented gas receiving compartments can be associated with a manifold. The vent gas produced from thermal runaway can be discharged to the vented gas receiving compartments, directed to a manifold, and discharge to the external atmosphere.Type: GrantFiled: December 8, 2021Date of Patent: February 27, 2024Assignee: Ford Global Technologies, LLCInventors: Chung-Hsing Kuo, Yongcai Wang, LeeAnn Wang, Che-chun Chang
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Publication number: 20230238647Abstract: Traction battery pack designs for use in electrified vehicles may include a vent management system adapted for managing battery cell vent byproducts during battery thermal events. The vent management system includes a multi-layered structure, with each layer of the structure having a unique function related to mitigating thermal propagation. The combined functions of the vent management system may include but are not limited to guiding vent byproducts along a desired path and direction, reducing the internal volume of the traction battery pack, and absorbing/trapping solid particles of the vent byproducts.Type: ApplicationFiled: January 21, 2022Publication date: July 27, 2023Inventors: Chung-Hsing KUO, Yongcai WANG, LeeAnn WANG, Che-chun CHANG
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Publication number: 20230173901Abstract: A traction battery pack venting system includes a plurality of battery arrays within a traction battery pack. The battery arrays each have a plurality of individual battery cells. The system further includes a divider system that provides a plurality of vented gas receiving compartments. Each of the vented gas receiving compartments are separate and distinct from the other vented gas receiving compartments within the plurality of vented gas receiving compartments. Each of the vented gas receiving compartments are associated with one of the battery arrays. Each of the vented gas receiving compartments can be associated with a manifold. The vent gas produced from thermal runaway can be discharged to the vented gas receiving compartments, directed to a manifold, and discharge to the external atmosphere.Type: ApplicationFiled: December 8, 2021Publication date: June 8, 2023Inventors: Chung-hsing Kuo, Yongcai Wang, LeeAnn Wang, Che-chun Chang
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Publication number: 20230101900Abstract: A structure of semiconductor device is provided, including a first circuit structure, formed on a first substrate. A first test pad is disposed on the first substrate. A second circuit structure is formed on a second substrate. A second test pad is disposed on the second substrate. A first bonding pad of the first circuit structure is bonded to a second bonding pad of the second circuit structure. One of the first test pad and the second test pad is an inner pad while another one of the first test pad and the second test pad is an outer pad, wherein the outer pad surrounds the inner pad.Type: ApplicationFiled: December 7, 2022Publication date: March 30, 2023Applicant: United Microelectronics Corp.Inventors: Zhirui Sheng, Hui-Ling Chen, Chung-Hsing Kuo, Chun-Ting Yeh, Ming-Tse Lin, Chien En Hsu
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Patent number: 11569188Abstract: A semiconductor device, including a first semiconductor substrate and a second semiconductor substrate, is provided. A first bonding structure is located on the first semiconductor substrate and includes a first pad having an elongated shape. A second bonding structure is located on the second semiconductor substrate and includes a second pad having an elongated shape. The first semiconductor substrate is bonded to the second semiconductor substrate by bonding the first bonding structure and the second bonding structure. The first pad is bonded to the second pad, and an extension direction of the first pad is different from an extension direction of the second pad.Type: GrantFiled: July 28, 2021Date of Patent: January 31, 2023Assignee: UNITED MICROELECTRONICS CORP.Inventors: Chung-Hsing Kuo, Chun-Ting Yeh, Ming-Tse Lin
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Patent number: 11557558Abstract: A structure of semiconductor device is provided, including a first circuit structure, formed on a first substrate. A first test pad is disposed on the first substrate. A second circuit structure is formed on a second substrate. A second test pad is disposed on the second substrate. A first bonding pad of the first circuit structure is bonded to a second bonding pad of the second circuit structure. One of the first test pad and the second test pad is an inner pad while another one of the first test pad and the second test pad is an outer pad, wherein the outer pad surrounds the inner pad.Type: GrantFiled: August 4, 2020Date of Patent: January 17, 2023Assignee: UNITED MICROELECTRONICS CORP.Inventors: Zhirui Sheng, Hui-Ling Chen, Chung-Hsing Kuo, Chun-Ting Yeh, Ming-Tse Lin, Chien En Hsu
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Publication number: 20220415836Abstract: A semiconductor device, including a first semiconductor substrate and a second semiconductor substrate, is provided. A first bonding structure is located on the first semiconductor substrate and includes a first pad having an elongated shape. A second bonding structure is located on the second semiconductor substrate and includes a second pad having an elongated shape. The first semiconductor substrate is bonded to the second semiconductor substrate by bonding the first bonding structure and the second bonding structure. The first pad is bonded to the second pad, and an extension direction of the first pad is different from an extension direction of the second pad.Type: ApplicationFiled: July 28, 2021Publication date: December 29, 2022Applicant: United Microelectronics Corp.Inventors: Chung-Hsing Kuo, Chun-Ting Yeh, Ming-Tse Lin
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Publication number: 20220384376Abstract: A package structure of a semiconductor device includes a first substrate, a second substrate, and a bonding layer. The bonding layer bonds the first substrate and the second substrate. The bonding layer includes an inner bonding pad pattern and an outer bonding pad pattern formed in a dielectric layer. The outer bonding pad pattern surrounds the inner bonding pad pattern. The outer bonding pad pattern includes first bonding pads, the inner bonding pad pattern includes second bonding pads, a density of the first bonding pads is greater than that of the second bonding pads. The first bonding pads of the outer bonding pad pattern is distributed to form a plurality of pad rings surrounding the inner bonding pad pattern, and the first bonding pads of the plurality of pad rings are aligned in a horizontal direction or a vertical direction.Type: ApplicationFiled: August 4, 2022Publication date: December 1, 2022Applicant: United Microelectronics Corp.Inventors: Ming-Tse Lin, Chung-Hsing Kuo, Hui-Ling Chen
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Patent number: 11450633Abstract: A package structure of a semiconductor device includes a first substrate, a second substrate, and a bonding layer. The bonding layer bonds the first substrate and the second substrate. The bonding layer includes an inner bonding pad pattern and an outer bonding pad pattern formed in a dielectric layer. The outer bonding pad pattern surrounds the inner bonding pad pattern. A first bonding pad density of the outer bonding pad pattern is greater than a second bonding pad density of the inner bonding pad pattern.Type: GrantFiled: February 4, 2020Date of Patent: September 20, 2022Assignee: UNITED MICROELECTRONICS CORP.Inventors: Ming-Tse Lin, Chung-Hsing Kuo, Hui-Ling Chen
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Publication number: 20220005775Abstract: A structure of semiconductor device is provided, including a first circuit structure, formed on a first substrate. A first test pad is disposed on the first substrate. A second circuit structure is formed on a second substrate. A second test pad is disposed on the second substrate. A first bonding pad of the first circuit structure is bonded to a second bonding pad of the second circuit structure. One of the first test pad and the second test pad is an inner pad while another one of the first test pad and the second test pad is an outer pad, wherein the outer pad surrounds the inner pad.Type: ApplicationFiled: August 4, 2020Publication date: January 6, 2022Applicant: United Microelectronics Corp.Inventors: Zhirui Sheng, Hui-Ling Chen, Chung-Hsing Kuo, Chun-Ting Yeh, Ming-Tse Lin, Chien En Hsu
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Patent number: 11164822Abstract: A structure of semiconductor device is provided. The structure includes a first bonding pattern, formed on a first substrate. A first grating pattern is disposed on the first substrate, having a plurality of first bars extending along a first direction. A second bonding pattern is formed on a second substrate. A second grating pattern, disposed on the second substrate, having a plurality of second bars extending along the first direction. The first bonding pattern is bonded to the second bonding pattern. One of the first grating pattern and the second grating pattern is stacked over and overlapping at the first direction with another one of the first grating pattern and the second grating pattern. A first gap between adjacent two of the first bars is different from a second gap between adjacent two of the second bars.Type: GrantFiled: September 28, 2020Date of Patent: November 2, 2021Assignee: UNITED MICROELECTRONICS CORP.Inventors: Chung-Hsing Kuo, Chun-Ting Yeh, Ming-Tse Lin, Hui-Ling Chen, Chien-Ming Lai
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Publication number: 20210202418Abstract: A package structure of a semiconductor device includes a first substrate, a second substrate, and a bonding layer. The bonding layer bonds the first substrate and the second substrate. The bonding layer includes an inner bonding pad pattern and an outer bonding pad pattern formed in a dielectric layer. The outer bonding pad pattern surrounds the inner bonding pad pattern. A first bonding pad density of the outer bonding pad pattern is greater than a second bonding pad density of the inner bonding pad pattern.Type: ApplicationFiled: February 4, 2020Publication date: July 1, 2021Applicant: United Microelectronics Corp.Inventors: MING-TSE LIN, Chung-Hsing Kuo, Hui-Ling Chen
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Patent number: 10446887Abstract: A battery pack includes a battery cell, a thermal interface material adjacent the battery cell and a heater element integrated with the thermal interface material.Type: GrantFiled: July 21, 2014Date of Patent: October 15, 2019Assignee: FORD GLOBAL TECHNOLOGIES, LLCInventors: Neil Robert Burrows, Steve F. Chorian, George Albert Garfinkel, Dhanunjay Vejalla, Chung-hsing Kuo
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Patent number: 10333118Abstract: A battery pack according to an exemplary aspect of the present disclosure includes, among other things, an electronics module and an electronics umbrella positioned to channel moisture away from the electronics module.Type: GrantFiled: January 22, 2016Date of Patent: June 25, 2019Assignee: FORD GLOBAL TECHNOLOGIES, LLCInventors: Eid Farha, Hari Addanki, Keith Kearney, Chung-hsing Kuo
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Patent number: 10199697Abstract: An exemplary battery pack includes a battery assembly and an enclosure assembly housing the battery assembly. The enclosure assembly is arranged to dissipate heat from at least two sides of the battery assembly.Type: GrantFiled: May 25, 2016Date of Patent: February 5, 2019Assignee: FORD GLOBAL TECHNOLOGIES, LLCInventors: Hari Addanki, Steve F. Chorian, George Albert Garfinkel, Keith Kearney, Kevin A. Montgomery, Chi Paik, Chung-hsing Kuo, Jeffrey Matthew Haag
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Patent number: 10192808Abstract: A semiconductor structure includes a substrate having a frontside surface and a backside surface. A through-substrate via extends into the substrate from the frontside surface. The through-substrate via comprises a top surface. A metal cap covers the top surface of the through-substrate via. A plurality of cylindrical dielectric plugs is embedded in the metal cap. The cylindrical dielectric plugs are distributed only within a central area of the metal cap. The central area is not greater than a surface area of the top surface of the through-substrate via.Type: GrantFiled: July 6, 2017Date of Patent: January 29, 2019Assignee: UNITED MICROELECTRONICS CORP.Inventors: Teng-Chuan Hu, Chun-Hung Chen, Chu-Fu Lin, Chun-Ting Yeh, Chung-Hsing Kuo, Ming-Tse Lin
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Publication number: 20190013259Abstract: A semiconductor structure includes a substrate having a frontside surface and a backside surface. A through-substrate via extends into the substrate from the frontside surface. The through-substrate via comprises a top surface. A metal cap covers the top surface of the through-substrate via. A plurality of cylindrical dielectric plugs is embedded in the metal cap. The cylindrical dielectric plugs are distributed only within a central area of the metal cap. The central area is not greater than a surface area of the top surface of the through-substrate via.Type: ApplicationFiled: July 6, 2017Publication date: January 10, 2019Inventors: Teng-Chuan Hu, Chun-Hung Chen, Chu-Fu Lin, Chun-Ting Yeh, Chung-Hsing Kuo, Ming-Tse Lin
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Publication number: 20170346144Abstract: An exemplary battery pack includes a battery assembly and an enclosure assembly housing the battery assembly. The enclosure assembly is arranged to dissipate heat from at least two sides of the battery assembly.Type: ApplicationFiled: May 25, 2016Publication date: November 30, 2017Inventors: Hari ADDANKI, Steve F. CHORIAN, George Albert GARFINKEL, Keith KEARNEY, Kevin A. MONTGOMERY, Chi PAIK, Chung-hsing KUO, Jeffrey Matthew HAAG
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Patent number: 9738176Abstract: An assembly includes a traction battery of an electrified vehicle, and a blend door moveable between a first position that permits a first flow of air to move toward the traction battery and a second position that permits a second flow of air to move toward the traction battery. The first flow includes more air that has moved through an engine compartment than the second flow.Type: GrantFiled: August 10, 2016Date of Patent: August 22, 2017Assignee: Ford Global Technologies, LLCInventors: George Albert Garfinkel, Neil Robert Burrows, Chung-hsing Kuo, Steve F. Chorian, Dhanunjay Vejalla