Patents by Inventor Chung Hwan Kwon

Chung Hwan Kwon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6340625
    Abstract: A method for forming a dual oxide layer on a silicon substrate provides that layer having varying thicknesses by using a damage layer formed on the silicon substrate, or a silicon nitride layer deposited on the silicon substrate. The damage layer is formed on the silicon substrate by dry etching a designated part of the silicon substrate, and the dual oxide layer is formed by using the properties of SiO2 by which the oxide layer growth speed on the damage layer is slower than that on the silicon substrate. A pattern of the damage layer is defined by photolithography, and the damage layer having a depth of about 20 to 5,000 Å is formed using CF4, CHF3, or Ar gas at a pressure of 900 mTorr or less, or using Cl2 or HBr. In the preoxidation cleaning step, a solution containing NH4F, HF, and H2O, a standard solution containing NH4OH, H2O2, and H2O, and/or HF are used.
    Type: Grant
    Filed: February 4, 2000
    Date of Patent: January 22, 2002
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang Kook Choi, Kyung Hawn Cho, Won Sik An, Chung Hwan Kwon
  • Publication number: 20010036751
    Abstract: A process for forming oxide layer on a wafer, which comprises a wet oxidation step using a pyrogenic steam as an oxidizing agent. The present invention comprises a flowing of an inert gas throughout the process including the wet oxidation step. The process allows an easy control of the oxide layer growth rate and oxide layer thickness, a formation of a more uniform oxide layer, and an improvement in the quality of the oxide layer.
    Type: Application
    Filed: June 4, 2001
    Publication date: November 1, 2001
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Chan-Sik Park, Sang-Woon Kim, Chung-Hwan Kwon, Sae-Hyoung Ryu
  • Patent number: 6207588
    Abstract: A method for forming a dual oxide layer on a silicon substrate provides that layer having varying thicknesses by using a damage layer formed on the silicon substrate, or a silicon nitride layer deposited on the silicon substrate. The damage layer is formed on the silicon substrate by dry etching a designated part of the silicon substrate, and the dual oxide layer is formed by using the properties of SiO2 by which the oxide layer growth speed on the damage layer is slower than that on the silicon substrate. A pattern of the damage layer is defined by photolithography, and the damage layer having a depth of about 20 to 5,000 Å is formed using CF4, CHF3, or Ar gas at a pressure of 900 m Torr or less, or using Cl2 or HBr. In the preoxidation cleaning step, a solution containing NH4F, HF, and H2O, a standard solution containing NH4OH, H2O2, and H2O, and/or HF are used.
    Type: Grant
    Filed: August 18, 1998
    Date of Patent: March 27, 2001
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang Kook Choi, Kyung Hawn Cho, Won Sik An, Chung Hwan Kwon
  • Patent number: 5711808
    Abstract: A boat for a vertical diffusion furnace has an upper disk and a lower disk spaced parallel from each other by a predetermined distance. A pair of first bars, having a plurality of wafer holding slots, face each other along a first center plane extending along a diameter of the upper and lower disks, and connect the upper and lower disks. A pair of second bars also connect the upper and lower disks, and are positioned at a predetermined angle with respect to a second center plane orthogonal to the first center plane. The second bars have a plurality of slots corresponding to the slots of the first bars. A pair of first auxiliary bars are installed adjacent to the pair of first bars to also connect the upper and lower disks. The boat may further have a pair of second auxiliary bars for connecting the upper and lower disks at positions adjacent to the pair of second bars. Also, a pair of horizontal supporting bars connect the first auxiliary bars to the second auxiliary bars.
    Type: Grant
    Filed: November 25, 1996
    Date of Patent: January 27, 1998
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-moon Yang, Chung-hwan Kwon, Sang-woon Kim, Choung-bae Park
  • Patent number: 5704984
    Abstract: A chemical vapor deposition (CVD) apparatus having a heat radiation structure. The CVD apparatus has a process chamber wherein the semiconductor substrate is located, a gas inlet for introducing a process gas into the process chamber, a manifold for supporting the process chamber and the gas inlet, and a heat radiating member provided around the gas inlet, for radiating heat transmitted from the manifold. The gas inlet has a plurality of radiation plates formed around the gas inlet and a plurality of through-holes formed in each of the radiation plates. With the gas inlet having the heat radiating structure, heat from the manifold during the deposition process is not transmitted to the gas supply line and the like. Thus the associated parts are not corroded or deformed.
    Type: Grant
    Filed: December 18, 1996
    Date of Patent: January 6, 1998
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Nam-Jin Lee, Sang-Kook Choi, Hyeog-Joon Ko, Chung-Hwan Kwon
  • Patent number: 5616025
    Abstract: A vertical diffusion furnace comprising; a quartz tube, a plurality of wafers loaded into the quartz tube, and a gas inlet formed in the quartz tube proximate a lowermost wafer in the plurality of wafers, and providing reactive gases into the quartz tube.
    Type: Grant
    Filed: November 16, 1995
    Date of Patent: April 1, 1997
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-kook Choi, Chung-hwan Kwon, Hong-keun Kim