Patents by Inventor Chung-Liang Lee

Chung-Liang Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240186258
    Abstract: Various embodiments of the present disclosure are directed towards a method for forming an integrated chip. An alignment process is performed on a first semiconductor workpiece and a second semiconductor workpiece by virtue of a plurality of workpiece pins. The first semiconductor workpiece is bonded to the second semiconductor workpiece. A shift value is determined between the first and second semiconductor workpieces by virtue of a first plurality of alignment marks on the first semiconductor workpiece and a second plurality of alignment marks on the second semiconductor workpiece. A layer of an integrated circuit (IC) structure is formed over the second semiconductor workpiece based at least in part on the shift value.
    Type: Application
    Filed: January 24, 2024
    Publication date: June 6, 2024
    Inventors: Yeong-Jyh Lin, Ching I Li, De-Yang Chiou, Sz-Fan Chen, Han-Jui Hu, Ching-Hung Wang, Ru-Liang Lee, Chung-Yi Yu
  • Publication number: 20240178059
    Abstract: A structure includes a first conductive feature, a first etch stop layer over the first conductive feature, a dielectric layer over the first etch stop layer, and a second conductive feature in the dielectric layer and the first etch stop layer. The second conductive feature is over and contacting the first conductive feature. An air spacer encircles the second conductive feature, and sidewalls of the second conductive feature are exposed to the air spacer. A protection ring further encircles the second conductive feature, and the protection ring fully separates the second conductive feature from the air spacer.
    Type: Application
    Filed: February 2, 2024
    Publication date: May 30, 2024
    Inventors: Chia Cheng Chou, Chung-Chi Ko, Tze-Liang Lee
  • Patent number: 11984485
    Abstract: A semiconductor device includes a substrate, a gate structure on the substrate, a source/drain (S/D) region and a contact. The S/D region is located in the substrate and on a side of the gate structure. The contact lands on and connected to the S/D region. The contact wraps around the S/D region.
    Type: Grant
    Filed: March 3, 2022
    Date of Patent: May 14, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Po-Hsien Cheng, Jr-Hung Li, Tai-Chun Huang, Tze-Liang Lee, Chung-Ting Ko, Jr-Yu Chen, Wan-Chen Hsieh
  • Patent number: 11978751
    Abstract: An electrode controls transmittance of a blocking layer over a photodiode of a pixel sensor (e.g., a photodiode of a small pixel detector) by changing oxidation of a metal material included in the blocking layer. By using the electrode to adjust transmittance of the blocking layer, pixel sensors for different uses and/or products may be produced using a single manufacturing process. As a result, power and processing resources are conserved that otherwise would have been expended in switching manufacturing processes. Additionally, production time is decreased (e.g., by eliminating downtime that would otherwise have been used to reconfigure fabrication machines.
    Type: Grant
    Filed: January 10, 2023
    Date of Patent: May 7, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Li-Wen Huang, Chung-Liang Cheng, Ping-Hao Lin, Kuo-Cheng Lee
  • Patent number: 11948954
    Abstract: An electrode controls transmittance of a blocking layer over a photodiode of a pixel sensor (e.g., a photodiode of a small pixel detector) by changing oxidation of a metal material included in the blocking layer. By using the electrode to adjust transmittance of the blocking layer, pixel sensors for different uses and/or products may be produced using a single manufacturing process. As a result, power and processing resources are conserved that otherwise would have been expended in switching manufacturing processes. Additionally, production time is decreased (e.g., by eliminating downtime that would otherwise have been used to reconfigure fabrication machines.
    Type: Grant
    Filed: January 10, 2023
    Date of Patent: April 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Li-Wen Huang, Chung-Liang Cheng, Ping-Hao Lin, Kuo-Cheng Lee
  • Publication number: 20240084447
    Abstract: A sealing article includes a body and a coating layer disposed on at least one surface of the body. The body comprises a polymeric elastomer such as perfluoroelastomer or fluoroelastomer. The coating layer comprises at least one metal. The sealing article may be a seal, a gasket, an O-ring, a T-ring or any other suitable product. The sealing article is resistant to ultra-violet (UV) light and plasma, and may be used for sealing a semiconductor processing chamber.
    Type: Application
    Filed: November 17, 2023
    Publication date: March 14, 2024
    Inventors: Peng-Cheng Hong, Jun-Liang Pu, W.L. Hsu, Chung-Hao Kao, Chia-Chun Hung, Cheng-Yi Wu, Chin-Szu Lee
  • Patent number: 11929329
    Abstract: A semiconductor device including a substrate, a low-k dielectric layer, a cap layer, and a conductive layer is provided. The low-k dielectric layer is disposed over the substrate. The cap layer is disposed on the low-k dielectric layer, wherein a carbon atom content of the cap layer is greater than a carbon atom content of the low-k dielectric layer. The conductive layer is disposed in the cap layer and the low-k dielectric layer.
    Type: Grant
    Filed: May 28, 2020
    Date of Patent: March 12, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Cheng Chou, Chung-Chi Ko, Tze-Liang Lee, Ming-Tsung Lee
  • Patent number: 11929281
    Abstract: A structure includes a first conductive feature, a first etch stop layer over the first conductive feature, a dielectric layer over the first etch stop layer, and a second conductive feature in the dielectric layer and the first etch stop layer. The second conductive feature is over and contacting the first conductive feature. An air spacer encircles the second conductive feature, and sidewalls of the second conductive feature are exposed to the air spacer. A protection ring further encircles the second conductive feature, and the protection ring fully separates the second conductive feature from the air spacer.
    Type: Grant
    Filed: September 21, 2021
    Date of Patent: March 12, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chia Cheng Chou, Chung-Chi Ko, Tze-Liang Lee
  • Patent number: 11923294
    Abstract: An interconnect structure includes an etching stop layer, a dielectric layer and an insert layer and a conductive line. The insert layer is located between the etching stop layer and the dielectric layer. The conductive line extends through the dielectric layer, the insert layer, and the etching stop layer. A material of the insert layer is different from the dielectric layer and the etching stop layer.
    Type: Grant
    Filed: April 29, 2022
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Cheng Chou, Chung-Chi Ko, Tze-Liang Lee
  • Patent number: 11920238
    Abstract: A method of making a sealing article that includes a body and a coating layer disposed on at least one surface of the body. The body comprises a polymeric elastomer such as perfluoroelastomer or fluoroelastomer. The coating layer comprises at least one metal. The sealing article may be a seal, a gasket, an O-ring, a T-ring or any other suitable product. The sealing article is resistant to ultra-violet (UV) light and plasma, and may be used for sealing a semiconductor processing chamber.
    Type: Grant
    Filed: July 22, 2022
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Peng-Cheng Hong, Jun-Liang Pu, W. L. Hsu, Chung-Hao Kao, Chia-Chun Hung, Cheng-Yi Wu, Chin-Szu Lee
  • Patent number: 11923433
    Abstract: A method for manufacturing a semiconductor device includes forming a first dielectric layer over a semiconductor fin. The method includes forming a second dielectric layer over the first dielectric layer. The method includes exposing a portion of the first dielectric layer. The method includes oxidizing a surface of the second dielectric layer while limiting oxidation on the exposed portion of the first dielectric layer.
    Type: Grant
    Filed: March 9, 2021
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sheng-Liang Pan, Yungtzu Chen, Chung-Chieh Lee, Yung-Chang Hsu, Chia-Yang Hung, Po-Chuan Wang, Guan-Xuan Chen, Huan-Just Lin
  • Patent number: 11916022
    Abstract: Various embodiments of the present disclosure are directed towards a semiconductor processing system including an overlay (OVL) shift measurement device. The OVL shift measurement device is configured to determine an OVL shift between a first wafer and a second wafer, where the second wafer overlies the first wafer. A photolithography device is configured to perform one or more photolithography processes on the second wafer. A controller is configured to perform an alignment process on the photolithography device according to the determined OVL shift. The photolithography device performs the one or more photolithography processes based on the OVL shift.
    Type: Grant
    Filed: June 7, 2022
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yeong-Jyh Lin, Ching I Li, De-Yang Chiou, Sz-Fan Chen, Han-Jui Hu, Ching-Hung Wang, Ru-Liang Lee, Chung-Yi Yu
  • Patent number: 11213239
    Abstract: A portable multi-lead electrocardiogram device includes a holding case, a signal processing module and three metal contacts. The signal processing module is located in the holding case. The metal contacts are located on an exterior surface of the holding case and are electrically connected to the signal processing module. The metal contacts are respectively a body contact, a left hand contact and a right hand contact. The device can measure the electrical activities of the heart beat from two different directions, which greatly improves detecting capability. Professional 12-lead electrocardiogram can also be performed by multiple times of measuring. This portable device allows patients with history of myocardial infarction to perform electrocardiogram test timely when feeling ill and to seek medical attention early.
    Type: Grant
    Filed: September 26, 2019
    Date of Patent: January 4, 2022
    Assignee: VIE LONGUE BIOTECH INC.
    Inventor: Chung-Liang Lee
  • Publication number: 20210093212
    Abstract: A portable multi-lead electrocardiogram device includes a holding case, a signal processing module and three metal contacts. The signal processing module is located in the holding case. The metal contacts are located on an exterior surface of the holding case and are electrically connected to the signal processing module. The metal contacts are respectively a body contact, a left hand contact and a right hand contact. The device can measure the electrical activities of the heart beat from two different directions, which greatly improves detecting capability. Professional 12-lead electrocardiogram can also be performed by multiple times of measuring. This portable device allows patients with history of myocardial infarction to perform electrocardiogram test timely when feeling ill and to seek medical attention early.
    Type: Application
    Filed: September 26, 2019
    Publication date: April 1, 2021
    Applicant: VIE LONGUE BIOTECH INC.
    Inventor: CHUNG-LIANG LEE
  • Publication number: 20150164678
    Abstract: A vacuum suction apparatus includes a cup body, an adjust member, and a seal assembly. Therein, the cup body is hollowed with two penetrable ends, having a neck portion disposed with penetrable first and second openings at both ends thereof, while the first opening is combined with a joining member. The adjust member is screwed to the joining member. The seal assembly has an upper partition, a lower partition, and a membrane, cooperating with the adjust member to allow the air to pass through the upper partition, the lower partition, and the adjust member. A negative pressure is produced due to the seal function of the membrane, such that a male genital organ reciprocates to feel the force of withdrawing and pushing. The forces are adjustable with the adjust member, and the user is able to control the speed of the apparatus reciprocation.
    Type: Application
    Filed: January 24, 2013
    Publication date: June 18, 2015
    Inventors: Chung-Liang Lee, Po-Cheng Li
  • Publication number: 20110204991
    Abstract: The exemplary embodiments described provide a low cost architecture for a quad-mode frontend of a communication device. In particular, the exemplary embodiments use diplexers to reduce the complexity of frontend switches and transceivers.
    Type: Application
    Filed: February 14, 2011
    Publication date: August 25, 2011
    Applicant: RF MICRO DEVICES, INC.
    Inventors: Jayanti Jaganatha Rao, Chung Liang Lee, Geoffrey Lee Howell
  • Publication number: 20100268858
    Abstract: There is disclosed a data connection device, particularly to a SATA data connection device with raised plug-in stability and reliability. The SATA data connection device mainly comprises a SATA data connection seat and a SATA component terminal. A seat body of the SATA data connection seat is provided therein with a slot. On each of two short perimeters of the seat body, there is additionally provided a laterally extending support frame having a snap-fit groove. Moreover, a shell layer of the SATA component terminal is additionally provided at the lower edge of each of two short perimeters thereof with a snap fitting. A snap hook, which may be pressed to tilt, is provided at the bottom end of the snap fitting. When a SATA data connector of the SATA component terminal is insertedly connected into the slot of the SATA data connection seat, the snap hook of the snap fitting may be also snapped into the snap-fit groove.
    Type: Application
    Filed: September 30, 2009
    Publication date: October 21, 2010
    Inventor: Chung-Liang Lee
  • Patent number: 7806733
    Abstract: A SATA data connector is provided with a power supply circuit. The SATA data connector comprises a male data connector and a female data connector. The male and female data connectors includes a signal interface having seven data connection pins. The male and female data connection pins each consist of four data pins, a power supplying pin or power receiving pin, and two ground pins, wherein the power supplying pin connects with a power line of a circuit board. Mating the female data connector to the male data connector causes an operating power to be supplied from the power line of the circuit board to an applied device connected to the female data connector such that the SATA data connector can work without an external SATA power cable.
    Type: Grant
    Filed: August 11, 2009
    Date of Patent: October 5, 2010
    Assignee: Innodisk Corporation
    Inventors: Chung-Liang Lee, Hsi-Hsi Wu, Hung Yu Chang
  • Patent number: 7641518
    Abstract: A modified standard SATA data connector is provided with a power supply circuit. The connector includes male and female data connectors. A male signal interface has seven male data connection pins, consisting of four data, a power supply, and two ground pins, the power supply pin replacing one of three original ground pins and connecting with a power line of a circuit board. A corresponding female signal interface has seven female data connection pins consisting of four data, a power receiving, and two ground pins. While the female and male data connectors are engaged, power can be supplied from the power line of the circuit board to an applied device connected with the female data connector via the power supplying and receiving pins. Thus, the SATA data connector can work without an external SATA power cable, and the volume of the cable can be reduced.
    Type: Grant
    Filed: August 14, 2007
    Date of Patent: January 5, 2010
    Assignee: Innodisk Corporation
    Inventors: Chung-Liang Lee, Hsi-Hsi Wu, Hung Yu Chang
  • Publication number: 20090298313
    Abstract: A SATA data connector is provided, which is with a power supply circuit. Accordingly, the SATA data connector comprises a male data connector and a female data connector. The male data connector is with a male signal interface that has seven male data connection pins, wherein the male data connection pins consist of four data pins, a power supplying pin, and two ground pins, wherein the power supplying pin connects with a power line of a circuit board. Corresponding to the male data connector, the female data connector is with a female signal interface that has seven female data connection pins as well, wherein the female data connection pins consist of four data pins, a power receiving pin, and two ground pins.
    Type: Application
    Filed: August 11, 2009
    Publication date: December 3, 2009
    Inventors: Chung-Liang Lee, Hsi-Hsi Wu, Hung Yu Chang