Patents by Inventor Chung-liang Wu

Chung-liang Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11996351
    Abstract: Semiconductor devices including lids having liquid-cooled channels and methods of forming the same are disclosed. In an embodiment, a semiconductor device includes a first integrated circuit die; a lid coupled to the first integrated circuit die, the lid including a plurality of channels in a surface of the lid opposite the first integrated circuit die; a cooling cover coupled to the lid opposite the first integrated circuit die; and a heat transfer unit coupled to the cooling cover through a pipe fitting, the heat transfer unit being configured to supply a liquid coolant to the plurality of channels through the cooling cover.
    Type: Grant
    Filed: June 15, 2022
    Date of Patent: May 28, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Sheng-Tsung Hsiao, Jen Yu Wang, Chung-Jung Wu, Tung-Liang Shao, Chih-Hang Tung
  • Publication number: 20240136251
    Abstract: A semiconductor device includes a package and a cooling cover. The package includes a first die having an active surface and a rear surface opposite to the active surface. The rear surface has a cooling region and a peripheral region enclosing the cooling region. The first die includes micro-trenches located in the cooling region of the rear surface. The cooling cover is stacked on the first die. The cooling cover includes a fluid inlet port and a fluid outlet port located over the cooling region and communicated with the micro-trenches.
    Type: Application
    Filed: January 4, 2024
    Publication date: April 25, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Jung Wu, Chih-Hang Tung, Tung-Liang Shao, Sheng-Tsung Hsiao, Jen-Yu Wang
  • Patent number: 11955405
    Abstract: A semiconductor package includes a package substrate; semiconductor devices disposed on the package substrate; a package ring disposed on a perimeter of the package substrate surrounding the semiconductor devices; a cover including silicon bonded to the package ring and covering the semiconductor devices; and a thermal interface structure (TIS) thermally connecting the semiconductor devices to the cover.
    Type: Grant
    Filed: January 17, 2022
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Jen Yu Wang, Chung-Jung Wu, Sheng-Tsung Hsiao, Tung-Liang Shao, Chih-Hang Tung, Chen-Hua Yu
  • Patent number: 11955721
    Abstract: An antenna apparatus, a communication apparatus, and a steering adjustment method thereof are provided. The antenna apparatus includes an antenna structure. The antenna structure includes an antenna unit. The antenna unit includes i feeding ports, where i is a positive integer larger than 2. A vector of each of the feeding ports is controlled independently. In the steering adjustment method, a designated direction is determined, where the designated direction corresponds to beam directionality of the antenna structure. In addition, the vectors of the feeding ports of the antenna unit are configured according to the designated direction. Accordingly, the antenna size can be reduced, and beam steering in multiple directions would be achieved.
    Type: Grant
    Filed: November 18, 2019
    Date of Patent: April 9, 2024
    Assignee: Gemtek Technology Co., Ltd.
    Inventors: Chung-Kai Yang, Sin-Liang Chen, Hsu-Sheng Wu, Hsiao-Ching Chien
  • Publication number: 20240084447
    Abstract: A sealing article includes a body and a coating layer disposed on at least one surface of the body. The body comprises a polymeric elastomer such as perfluoroelastomer or fluoroelastomer. The coating layer comprises at least one metal. The sealing article may be a seal, a gasket, an O-ring, a T-ring or any other suitable product. The sealing article is resistant to ultra-violet (UV) light and plasma, and may be used for sealing a semiconductor processing chamber.
    Type: Application
    Filed: November 17, 2023
    Publication date: March 14, 2024
    Inventors: Peng-Cheng Hong, Jun-Liang Pu, W.L. Hsu, Chung-Hao Kao, Chia-Chun Hung, Cheng-Yi Wu, Chin-Szu Lee
  • Publication number: 20240084455
    Abstract: Some implementations described herein include systems and techniques for fabricating a wafer-on-wafer product using a filled lateral gap between beveled regions of wafers included in a stacked-wafer assembly and along a perimeter region of the stacked-wafer assembly. The systems and techniques include a deposition tool having an electrode with a protrusion that enhances an electromagnetic field along the perimeter region of the stacked-wafer assembly during a deposition operation performed by the deposition tool. Relative to an electromagnetic field generated by a deposition tool not including the electrode with the protrusion, the enhanced electromagnetic field improves the deposition operation so that a supporting fill material may be sufficiently deposited.
    Type: Application
    Filed: February 8, 2023
    Publication date: March 14, 2024
    Inventors: Che Wei YANG, Chih Cheng SHIH, Kuo Liang LU, Yu JIANG, Sheng-Chan LI, Kuo-Ming WU, Sheng-Chau CHEN, Chung-Yi YU, Cheng-Yuan TSAI
  • Publication number: 20240088227
    Abstract: The structure of a semiconductor device with different gate structures configured to provide ultra-low threshold voltages and a method of fabricating the semiconductor device are disclosed. The method includes forming first and second nanostructured channel regions in first and second nanostructured layers, respectively, and forming first and second gate-all-around (GAA) structures surrounding the first and second nanostructured channel regions, respectively. The forming the first and second GAA structures includes selectively forming an Al-based n-type work function metal layer and a Si-based capping layer on the first nanostructured channel regions, depositing a bi-layer of Al-free p-type work function metal layers on the first and second nanostructured channel regions, depositing a fluorine blocking layer on the bi-layer of Al-free p-type work function layers, and depositing a gate metal fill layer on the fluorine blocking layer.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chung-Liang CHENG, Chun-I WU, Huang-Lin CHAO
  • Patent number: 11920238
    Abstract: A method of making a sealing article that includes a body and a coating layer disposed on at least one surface of the body. The body comprises a polymeric elastomer such as perfluoroelastomer or fluoroelastomer. The coating layer comprises at least one metal. The sealing article may be a seal, a gasket, an O-ring, a T-ring or any other suitable product. The sealing article is resistant to ultra-violet (UV) light and plasma, and may be used for sealing a semiconductor processing chamber.
    Type: Grant
    Filed: July 22, 2022
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Peng-Cheng Hong, Jun-Liang Pu, W. L. Hsu, Chung-Hao Kao, Chia-Chun Hung, Cheng-Yi Wu, Chin-Szu Lee
  • Patent number: 11917772
    Abstract: A power supply with a separable communication module includes a casing with a port; a main board placed in the casing and having a power conversion circuit; a sub-board electrically connected to the power conversion circuit and provided with at least one first connector; and a communication module. The power conversion circuit has at least one electrical connection terminal. A first interface of the first connector faces the port. The communication module includes a first circuit board and a communication circuit disposed on the first circuit board, the first circuit board has an electrical connection part electrically connected to the communication circuit, the electrical connection part has a first state of connecting with the first interface, and a second state of detaching from the first interface.
    Type: Grant
    Filed: December 6, 2021
    Date of Patent: February 27, 2024
    Assignee: COTEK ELECTRONIC IND. CO., LTD.
    Inventors: Chun-Wei Wu, Ta-Chang Wei, Chung-Liang Tsai, Shou-Cheng Yeh
  • Patent number: 6667587
    Abstract: A flickering mode control system, for operating a high intensity discharge lamp at a flickering mode, comprises an output power controllable transformer and a flickering control unit. The flickering control unit outputs a power modulation signal to a switch the output power controllable transformer for determining a power of a direct current signal output from the output power controllable transformer. In a relatively dim state of the flickering mode, the high intensity discharge lamp has a low enough illumination, resulting in that it looks like the high intensity discharge lamp is completely extinguished. Actually, the high intensity discharge lamp still remains illuminated even in the relatively dim state of the flickering mode. Therefore, the flickering mode is realized without the use of a hot restike ignitor, thereby increasing a lifetime of the high intensity discharge lamp and its operation safety.
    Type: Grant
    Filed: December 24, 2002
    Date of Patent: December 23, 2003
    Assignee: Ever Bright Optoelectronics Co., Ltd.
    Inventors: Wen-chou Chang, Chung-liang Wu