Abstract: The disclosed invention presents a self-tracking reference circuit that compensates for IR drops and achieves the target resistance state at different temperatures after write operations. The disclosed self-tracking reference circuit includes a replica access path, a configurable resistor network, a replica selector mini-array and a step current generator that track PVT variations to provide a PVT tracking level for RRAM verify operation.

Abstract: A resistive random-access memory (RRAM) circuit includes an RRAM device configured to output a cell current responsive to a bit line voltage, and a current limiter including an input terminal coupled to the RRAM device, first and second parallel current paths configured to conduct the cell current between the input terminal and a reference voltage node, and an amplifier configured to generate a first signal responsive to a voltage level at the input terminal and a reference voltage level. Each of the first and second current paths includes a switching device configured to selectively conduct a portion of the cell current responsive to the first signal.

Abstract: A battery balance management circuit includes an active and passive testing balance bus, a plurality of battery sets, a primary charging converter, a secondary charging system, an electrical load and a battery management system. An external balance management mechanism is utilized to compensate for current loss of the battery set, effectively enabling the battery sets to provide stable large current output.

Abstract: A battery balance management circuit includes an active and passive testing balance bus, a plurality of battery sets, a primary charging converter, a secondary charging system, an electrical load and a battery management system. An external balance management mechanism is utilized to compensate for current loss of the battery set, effectively enabling the battery sets to provide stable large current output.