Patents by Inventor Chung-Peng Ho

Chung-Peng Ho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7582414
    Abstract: A method and system is described for drying a thin film on a substrate following liquid immersion lithography. Drying the thin film to remove immersion liquid from the thin film is performed prior to baking the thin film, thereby reducing the likely hood for interaction of immersion liquid with the baking process. This interaction has been shown to cause non-uniformity in critical dimension for the pattern formed in the thin film following the developing process.
    Type: Grant
    Filed: May 26, 2006
    Date of Patent: September 1, 2009
    Assignee: Tokyo Electron Limited
    Inventors: Chung-Peng Ho, Kathleen Nafus, Kaz Yoshioka, Richard Yamaguchi
  • Publication number: 20060216651
    Abstract: A method and system is described for drying a thin film on a substrate following liquid immersion lithography. Drying the thin film to remove immersion fluid from the thin film is performed prior to baking the thin film, thereby reducing the likely hood for interaction of immersion fluid with the baking process. This interaction has been shown to cause non-uniformity in critical dimension for the pattern formed in the thin film following the developing process.
    Type: Application
    Filed: May 26, 2006
    Publication date: September 28, 2006
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Chung-Peng Ho, Kathleen Nafus, Kaz Yoshioka, Richard Yamaguchi
  • Patent number: 7070915
    Abstract: A method and system is described for drying a thin film on a substrate following liquid immersion lithography. Drying the thin film to remove immersion fluid from the thin film is performed prior to baking the thin film, thereby reducing the likely hood for interaction of immersion fluid with the baking process. This interaction has been shown to cause non-uniformity in critical dimension for the pattern formed in the thin film following the developing process.
    Type: Grant
    Filed: August 29, 2003
    Date of Patent: July 4, 2006
    Assignee: Tokyo Electron Limited
    Inventors: Chung-Peng Ho, Kathleen Nafus, Kaz Yoshioka, Richard Yamaguchi
  • Publication number: 20050046934
    Abstract: A method and system is described for drying a thin film on a substrate following liquid immersion lithography. Drying the thin film to remove immersion fluid from the thin film is performed prior to baking the thin film, thereby reducing the likely hood for interaction of immersion fluid with the baking process. This interaction has been shown to cause non-uniformity in critical dimension for the pattern formed in the thin film following the developing process.
    Type: Application
    Filed: August 29, 2003
    Publication date: March 3, 2005
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Chung-Peng Ho, Kathleen Nafus, Kaz Yoshioka, Richard Yamaguchi
  • Patent number: 6586160
    Abstract: A resist layer (34) on a semiconductor wafer (20) is patterned by using a scanning exposure system (50) which provides light, containing pattern information which is intended to be transferred to the wafer. The lithographic system is a step and scan system in which a reticle (16) passes between a light source and a lens system(18). The wafer with the resist layer is passed through a focal plane of the patterned light at a tilt angle (&thgr;). The user selects a desirable range for the depth of the resist to be exposed at the focus of the patterned light. The tilt angle is calculated by taking the arc tangent of the desirable range divided by a width of a slit region (52) of the projected light. The depth of focus increases over standard step and scan techniques.
    Type: Grant
    Filed: March 26, 2001
    Date of Patent: July 1, 2003
    Assignee: Motorola, Inc.
    Inventors: Chung-Peng Ho, Bernard J. Roman, Chong-Cheng Fu
  • Publication number: 20020136992
    Abstract: A resist layer (34) on a semiconductor wafer (20) is patterned by using a scanning exposure system (50) which provides light, containing pattern information which is intended to be transferred to the wafer. The lithographic system is a step and scan system in which a reticle (16) passes between a light source and a lens system(18). The wafer with the resist layer is passed through a focal plane of the patterned light at a tilt angle (&thgr;). The user selects a desirable range for the depth of the resist to be exposed at the focus of the patterned light. The tilt angle is calculated by taking the arc tangent of the desirable range divided by a width of a slit region (52) of the projected light. The depth of focus increases over standard step and scan techniques.
    Type: Application
    Filed: March 26, 2001
    Publication date: September 26, 2002
    Inventors: Chung-Peng Ho, Bernard J. Roman, Chong-Cheng Fu