Patents by Inventor Chung-Shan Chen

Chung-Shan Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240170544
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, an epitaxy layer, a well region, a gate electrode, a conductive structure, and a source electrode. The substrate has a first conductive type. The epitaxy layer has the first conductive type and is disposed on the substrate. The well region has a second conductive type. The second conductive type is different than the first conductive type. The well region is disposed in the epitaxy layer. The gate electrode is disposed on the well region. The conductive structure includes an upper portion and a lower portion. The lower portion extends in the direction of the substrate into the epitaxy layer and the upper portion is disposed on the epitaxy layer. The source electrode is disposed on the conductive structure.
    Type: Application
    Filed: November 21, 2022
    Publication date: May 23, 2024
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Wen-Shan LEE, Chung-Yeh LEE, Fu-Hsin CHEN
  • Patent number: 6541736
    Abstract: The present invention provides a circuit board/printed circuit board having pre-reserved conductive heating circuits, which comprises a plurality of metal circuit substrates and a plurality of layers of insulating material. The conductive heating circuits are disposed on the metal circuit substrates. Each of the conductive heating circuits has a plurality of direct heat-generating regions. The insulating material is disposed between the metal circuit substrates. When a current is provided to the conductive heating circuits, heat required for partly bonding and hardening can be generated so that the insulating material and the corresponding positions of the direct heat-generating regions on the metal circuit substrates can be bonded and hardened together. A pre-stacked multi-layer metal circuit board with partly bonding and hardening is thus finished.
    Type: Grant
    Filed: December 10, 2001
    Date of Patent: April 1, 2003
    Assignee: Usun Technology Co., Ltd.
    Inventors: Chiu Fong Huang, Chung-Shan Chen
  • Patent number: 5761609
    Abstract: A limited use circuit in an electronic system that comprises a state machine which controls the operability of the electronic system and determines after boot whether a non-volatile memory device is at its initial data point and then allows the system to operate if it is at its initial data point or cause the electronic system to go down if it is not wherein the state machine is comprised of registers and logic gates or a CPU and a mask circuit and the non-volatile memory device may be selected from the group consisting of PLD, PAL, PLA, EEPROM, FLASH and ROM.
    Type: Grant
    Filed: March 9, 1995
    Date of Patent: June 2, 1998
    Assignee: United Microelectronics Corporation
    Inventor: Chung-Shan Chen