Abstract: A method includes forming a first fin and a second fin protruding from a frontside of a substrate, forming a gate stack over the first and second fins, forming a dielectric feature dividing the gate stack into a first segment engaging the first fin and a second segment engaging the second fin, and growing a first epitaxial feature on the first fin and a second epitaxial feature on the second fin. The dielectric feature is disposed between the first and second epitaxial features. The method also includes performing an etching process on a backside of the substrate to form a backside trench, and forming a backside via in the backside trench. The backside trench exposes the dielectric feature and the first and second epitaxial features. The backside via straddles the dielectric feature and is in electrical connection with the first and second epitaxial features.

Abstract: A biological particle analysis method is provided and includes the following steps: fluorescence staining a liquid specimen through a fluorescence staining process so as to enable a target biological particle in the liquid specimen to becomes a fluorescence; accommodating the liquid specimen into a pico-droplet generator and using a camera device to take a real-time image of the liquid specimen; using the pico-droplet generator to output a target pico-droplet having the target biological particle onto a biochip according to the real-time image; removing the fluorescent color of the target biological particle in the target pico-droplet through a washing process; and fluorescence staining the target biological particle captured by the biochip at multiple times through the fluorescence staining process and the washing process, so as to obtain a plurality of fluorescence images respectively corresponding to multiple kinds of biological characterization expressions.

Abstract: A biological particle enrichment apparatus and a pico-droplet generator thereof are provided. The pico-droplet generator includes a container, a hollow needle connected to the container, a first piezoelectric member disposed on the container, and a second piezoelectric member disposed on the hollow needle. The container can receive a liquid specimen having biological particles. The hollow needle and the container are fluid communicated with each other, and an inner diameter of the container is within a range from 5 times to 30 times of an inner diameter of the hollow needle. The first piezoelectric member is annularly disposed on a surrounding lateral side of the container, and enables the biological particles in the container to move along a direction away from the surrounding lateral side by vibrating the container. The second piezoelectric member can squeeze the hollow needle, so that the liquid specimen flows outwardly to form a pico-droplet.

Abstract: A new method is provided for mounting high-density IC semiconductor devices. A layer of epoxy is deposited over the first surface of a metal panel. One or more thin film interconnect layers are then created on top of the epoxy layer. The BUM technology allows for the creation of a succession of layers over the thin film layers. The combined layers of thin film and BUM form the interconnect substrate. One or more cavities are created in the second surface of the metal panel; openings through the layer of epoxy are created where the layer of epoxy is exposed. One or more IC semiconductor die are inserted into the cavities, are electrically connected to the openings that have been created in the layer of epoxy. Openings are created in the bottom BUM layer; solder balls are inserted and attached to this BUM layer for the completion of the Ball Grid Array (BGA) package.

Abstract: A method is provided for mounting high-density wire bond semiconductor devices. A layer of dielectric is deposited over the first surface of a metal panel. One or more thin film interconnect layers are then created on top of the dielectric layer. The BUM technology allows for the creation of a succession of layers over the thin film layers. The combined layers of thin film and BUM form the interconnect substrate. One or more cavities are created in the second surface of the metal panel; openings through the layer of dielectric are created where the layer of dielectric is exposed. One or more wire bond semiconductor die are inserted into the cavities, are die bonded and wire bonded to the openings that have been created in the layer of dielectric. Openings are created in the bottom BUM layer; solder balls are inserted and attached to this BUM layer for the completion of the Ball Grid Array (BGA) package.

Abstract: A new method is provided for mounting high-density wire bond semiconductor devices. A layer of dielectric is deposited over the first surface of a metal panel. One or more thin film interconnect layers are then created on top of the dielectric layer. The BUM technology allows for the creation of a succession of layers over the thin film layers. The combined layers of thin film and BUM form the interconnect substrate. One or more cavities are created in the second surface of the metal panel; openings through the layer of dielectric are created where the layer of dielectric is exposed. One or more wire bond semiconductor die are inserted into the cavities, are die bonded and wire bonded to the openings that have been created in the layer of dielectric. Openings are created in the bottom BUM layer; solder balls are inserted and attached to this BUM layer for the completion of the Ball Grid Array (BGA) package.

Abstract: A new method is provided for mounting high-density IC semiconductor devices. A layer of epoxy is deposited over the first surface of a metal panel. One or more thin film interconnect layers are then created on top of the epoxy layer. The BUM technology allows for the creation of a succession of layers over the thin film layers. The combined layers of thin film and BUM form the interconnect substrate. One or more cavities are created in the second surface of the metal panel; openings through the layer of epoxy are created where the layer of epoxy is exposed. One or more IC semiconductor die are inserted into the cavities, are electrically connected to the openings that have been created in the layer of epoxy. Openings are created in the bottom BUM layer; solder balls are inserted and attached to this BUM layer for the completion of the Ball Grid Array (BGA) package.

Abstract: A new method is provided for mounting high-density IC semiconductor devices. A layer of epoxy is deposited over the first surface of a metal panel. One or more thin film interconnect layers are then created on top of the epoxy layer. The BUM technology allows for the creation of a succession of layers over the thin film layers. The combined layers of thin film and BUM form the interconnect substrate. One or more cavities are created in the second surface of the metal panel; openings through the layer of epoxy are created where the layer of epoxy is exposed. One or more IC semiconductor die are inserted into the cavities, are electrically connected to the openings that have been created in the layer of epoxy. Openings are created in the bottom BUM layer; solder balls are inserted and attached to this BUM layer for the completion of the Ball Grid Array (BGA) package.

Abstract: A new method is provided for mounting high-density wire bond semiconductor devices. A layer of dielectric is deposited over the first surface of a metal panel. One or more thin film interconnect layers are then created on top of the dielectric layer. The BUM technology allows for the creation of a succession of layers over the thin film layers. The combined layers of thin film and BUM form the interconnect substrate. One or more cavities are created in the second surface of the metal panel; openings through the layer of dielectric are created where the layer of dielectric is exposed. One or more wire bond semiconductor die are inserted into the cavities, are die bonded and wire bonded to the openings that have been created in the layer of dielectric. Openings are created in the bottom BUM layer; solder balls are inserted and attached to this BUM layer for the completion of the Ball Grid Array (BGA) package.

Abstract: A thin MCM packaging structure and technique is provided in which a thin film decal interconnect circuit is fabricated on a thin aluminum wafer. The thin-film decal interconnect employs Au metallurgy for bonding and comprises a bond pad/ground plane layer, topside pads, and one or more routing layers. The top routing layer also acts as the pad layer along the edge of the interconnect structure. The underside of the decal interconnect structure is provided with metal pads for attachment to conventional aluminum or gold I/O pads on one surface of the integrated circuit die. A thermosonic bonding system is used to bond the die pads to the pads. The aluminum wafer is selectively removed forming one or more cavities to hold one or more die to be mounted on the MCM structure. The die are oriented with their pads in contact with contact pads on the thin-film decal interconnect to which they are bonded and the cavities are filled with a liquid encapsulant and cured.

Abstract: An integrated circuit package has multiple integrated circuits (ICs) mounted face down directly on one surface of a flexible circuit which is disposed in an opening of a rigid signal carrier, such as a pin grid array. The flexible circuit provides connections among the ICs, and also between the ICs and the signal carrier via wirebonds. The flexible circuit is attached to a rigid support ring that is bonded to the signal carrier adjacent to the opening. A thermally conductive lid covers the opening and contacts the backs of the ICs for heat removal. A rigid plate presses elastomeric pads against the other surface of the flexible circuit to maintain firm contact between the flexible circuit and the ICs and also between the ICs and the lid. The package may be hermetically sealed by attaching a cover to the support ring.

Abstract: A first level interconnection structure is fabricated by forming conductor patterns on the top surface of a thin flexible polymer film temporarily supported on a rigid thin ceramic or metal support member having windows therein. Via openings in the bottom surface of the polymer film are made to selected conductors, and the openings are filled with bonding metallurgy. The lower surface of the film is coated with a partially cured polyimide adhesive. The adhesive is removed in the via areas to expose the bonding metallurgy. This first layer structure is tested and then transferred to the ceramic substrate of a VSLI circuit interconnection module on which corresponding metal pads are formed for pad-to-pad contact. When pressure and heat are applied, there occurs simultaneous bonding of the metal pads on the substrate and of the film directly to the substrate. A second level interconnection structure is formed in the same manner and bonded to the top surface of the first level structure.