Abstract: A method includes forming a first fin and a second fin protruding from a frontside of a substrate, forming a gate stack over the first and second fins, forming a dielectric feature dividing the gate stack into a first segment engaging the first fin and a second segment engaging the second fin, and growing a first epitaxial feature on the first fin and a second epitaxial feature on the second fin. The dielectric feature is disposed between the first and second epitaxial features. The method also includes performing an etching process on a backside of the substrate to form a backside trench, and forming a backside via in the backside trench. The backside trench exposes the dielectric feature and the first and second epitaxial features. The backside via straddles the dielectric feature and is in electrical connection with the first and second epitaxial features.

Abstract: Semiconductor device structures having gate structures with tunable threshold voltages are provided. Various geometries of device structure can be varied to tune the threshold voltages. In some examples, distances from tops of fins to tops of gate structures can be varied to tune threshold voltages. In some examples, distances from outermost sidewalls of gate structures to respective nearest sidewalls of nearest fins to the respective outermost sidewalls (which respective gate structure overlies the nearest fin) can be varied to tune threshold voltages.

Abstract: The disclosure provides a light cabinet, including multiple light boards and multiple light-board controllers. The light boards form a first light-board array of the light cabinet. The light-board controllers are arranged one-to-one on the light boards. The light-board controllers of the light boards in a first column of the first light-board array are connected in series to form a first controller string. The output terminal of the first controller string is connected electrically to an input terminal of a second controller string in a corresponding column of a second light-board array of another light cabinet. The input terminal of the first controller string is connected electrically to a first output terminal of a video data splitter (or an output terminal of a third controller string in a corresponding column of a third light-board array of yet another light cabinet).

Abstract: The disclosure provides an image uniformity compensation device. The image uniformity compensation device includes a local pre-compensation circuit, a chromaticity uniformity compensation circuit, a local post-compensation circuit, and a luminance uniformity correction circuit. A local pre-conversion performed by the local pre-compensation circuit includes the following. An image frame is divided into multiple regions, and each of the regions is converted from an optical non-linear domain to an optical linear domain to generate a corresponding region in multiple regions of a converted frame. A local post-conversion performed by the local post-compensation circuit includes the following. An image frame is divided into multiple regions, and each of the regions is converted from the optical linear domain to the optical non-linear domain to generate a corresponding region in multiple regions of a converted frame.

Abstract: The disclosure provides an image uniformity compensation device. The image uniformity compensation device includes a local pre-compensation circuit, a chromaticity uniformity compensation circuit, a local post-compensation circuit, and a luminance uniformity correction circuit. A local pre-conversion performed by the local pre-compensation circuit includes the following. An image frame is divided into multiple regions, and each of the regions is converted from an optical non-linear domain to an optical linear domain to generate a corresponding region in multiple regions of a converted frame. A local post-conversion performed by the local post-compensation circuit includes the following. An image frame is divided into multiple regions, and each of the regions is converted from the optical linear domain to the optical non-linear domain to generate a corresponding region in multiple regions of a converted frame.

Abstract: The disclosure provides a light cabinet, including multiple light boards and multiple light-board controllers. The light boards form a first light-board array of the light cabinet. The light-board controllers are arranged one-to-one on the light boards. The light-board controllers of the light boards in a first column of the first light-board array are connected in series to form a first controller string. The output terminal of the first controller string is connected electrically to an input terminal of a second controller string in a corresponding column of a second light-board array of another light cabinet. The input terminal of the first controller string is connected electrically to a first output terminal of a video data splitter (or an output terminal of a third controller string in a corresponding column of a third light-board array of yet another light cabinet).

Abstract: A signal processing circuit, complying with DisplayPort standard and operated in a display device which is as a DisplayPort sink device, includes a main physical circuit, which is configured to receive a first signal from one of a plurality of DisplayPort connectors of the display device connected to a first DisplayPort source device and a plurality of auxiliary physical circuits. Only a first auxiliary physical circuit of the plurality of auxiliary physical circuits is enabled to receive a second signal from the DisplayPort connector connected to the first DisplayPort source device.

Abstract: A device for image processing includes a video signal receiver, for receiving at least one video signal, wherein an image frame of the at least one video signal includes: a plurality of pixel groups; a color engine; and an output stage, coupled to the color engine, for outputting the adjusted at least one video signal. The color engine includes: a local adjusting unit, configured to locally adjust at least one of color hue, luminance factor and saturation of a specific pixel group of the pixel groups without adjusting any other pixel group of the pixel groups, wherein the specific pixel group has color hue in a predetermined range that is a part of a full range of color hue; and a global adjusting unit, configured to globally adjust at least one of color hue, luminance factor and saturation of each of the pixels of the image frame.

Abstract: A device for image processing includes a video signal receiver, for receiving at least one video signal, wherein an image frame of the at least one video signal includes: a plurality of pixel groups; a color engine; and an output stage, coupled to the color engine, for outputting the adjusted at least one video signal. The color engine includes: a local adjusting unit, configured to locally adjust at least one of color hue, luminance factor and saturation of a specific pixel group of the pixel groups without adjusting any other pixel group of the pixel groups, wherein the specific pixel group has color hue in a predetermined range that is a part of a full range of color hue; and a global adjusting unit, configured to globally adjust at least one of color hue, luminance factor and saturation of each of the pixels of the image frame.

Abstract: A device for image processing includes: a video signal receiver, for receiving at least one video signal; a color engine, comprising a local adjusting unit, for dividing pixels of an image frame of the at least one video signal into multiple pixel groups according to luminance factors of the pixels in HSI color space and adjusting the luminance factors of a specific pixel group of the pixel groups having luminance factors in a predetermined range that is a part of a full range of luminance factor by moving the pixels of the specific pixel group from a region to another region of the HSI color space without changing color axes of the HSI color space.

Abstract: A display device and a color adjustment method thereof and a method for displaying video signals are provided. The display device includes a video signal receiver, a scaling engine, a color engine, an output stage, and a panel. The video signal receiver receives the video signals. The scaling engine is coupled to the video signal receiver to modulate the resolution of the video signal. The color engine is coupled to the scaling engine, which includes a local adjusting unit. The local adjusting unit adjusts hue, saturation, or intensity of a group of pixels, and thereby increase the quality of images. The output stage is coupled to the color engine, which outputs the adjusted video signals. The panel is coupled to the output stage, which displays the adjusted video signal.

Abstract: A contrast control apparatus includes a statistic distribution unit and a characteristic judging unit. The statistic distribution unit receives an image data to have a brightness histogram distribution in statistic. The brightness histogram distribution has a plurality of statistic nodes, respectively corresponding to a plurality of gray levels in statistic. The characteristic judging unit at least receives the brightness histogram distribution to determine a brightness adjusting signal for the image data, so as to proportionally adjust a brightness of a display light source. In addition, the characteristic judging unit also outputs a contrast curve, and the contrast curve represents a plurality of adjusted nodes, respectively corresponding to the statistic nodes. As a result, the brightness of the statistic nodes is changed.

Abstract: A memory access apparatus and a display using the same are provided. The memory access apparatus includes a dynamic memory, a plurality of clients and a memory management unit. The dynamic memory is used to store a plurality of memory data. The clients access the dynamic memory and each client has a priority. The memory management unit executes an access action of the clients for the dynamic memory respectively according to the priorities thereof. Besides, the memory management unit has at least one buffer area built therein. The buffer area is used to temporarily store a plurality of buffer data generated while the access action is performed.

Abstract: A memory access apparatus and a display using the same are provided. The memory access apparatus includes a dynamic memory, a plurality of clients and a memory management unit. The dynamic memory is used to store a plurality of memory data. The clients access the dynamic memory and each client has a priority. The memory management unit executes an access action of the clients for the dynamic memory respectively according to the priorities thereof. Besides, the memory management unit has at least one buffer area built therein. The buffer area is used to temporarily store a plurality of buffer data generated while the access action is performed.

Abstract: For example, to adjust an offset of a pressure sensor, there are provided an external resistor RE and an internal resistor circuit that is connected to both ends of RE and formed in a semiconductor chip such as a processor. The internal resistor circuit includes N pieces of internal resistors RI connected in series between both ends of RE, and (N+1) pieces of switches selecting one of voltages of respective nodes of the serial resistors and outputs the same as a signal. RE has a high absolute value precision of, e.g., several ten ohms to several hundred ohms, and RI has a high relative value precision of, e.g., several kilo-ohms. Therefore, an offset adjustment range is decided at a high absolute value precision mainly by RE, and with regard to the arrangement resolution, a high precision can be obtained along with the relative value precision of the RI.

Abstract: For example, to adjust an offset of a pressure sensor, there are provided an external resistor RE and an internal resistor circuit that is connected to both ends of RE and formed in a semiconductor chip such as a processor. The internal resistor circuit includes N pieces of internal resistors RI connected in series between both ends of RE, and (N+1) pieces of switches selecting one of voltages of respective nodes of the serial resistors and outputs the same as a signal. RE has a high absolute value precision of, e.g., several ten ohms to several hundred ohms, and RI has a high relative value precision of, e.g., several kilo-ohms. Therefore, an offset adjustment range is decided at a high absolute value precision mainly by RE, and with regard to the arrangement resolution, a high precision can be obtained along with the relative value precision of the RI.

Abstract: A method for dithering image data is provided. The method is suitable for representing A-bit grayscale values with a B-bit resolution, where A and B are positive integers and A>B. The main steps of the method include calculating 2A target grayscale values with decimals within an interval from 0 to (2B?1)*2A?B, and then representing the target grayscale values with the decimals through 2-dimensional dithering or 3-dimensional dithering.

Abstract: A memory access apparatus and a display using the same are provided. The memory access apparatus includes a dynamic memory, a plurality of clients and a memory management unit. The dynamic memory is used to store a plurality of memory data. The clients access the dynamic memory and each client has a priority. The memory management unit executes an access action of the clients for the dynamic memory respectively according to the priorities thereof. Besides, the memory management unit has at least one buffer area built therein. The buffer area is used to temporarily store a plurality of buffer data generated while the access action is performed.

Abstract: For example, to adjust an offset of a pressure sensor, there are provided an external resistor RE and an internal resistor circuit that is connected to both ends of RE and formed in a semiconductor chip such as a processor. The internal resistor circuit includes N pieces of internal resistors RI connected in series between both ends of RE, and (N+1) pieces of switches selecting one of voltages of respective nodes of the serial resistors and outputs the same as a signal. RE has a high absolute value precision of, e.g., several ten ohms to several hundred ohms, and RI has a high relative value precision of, e.g., several kilo-ohms. Therefore, an offset adjustment range is decided at a high absolute value precision mainly by RE, and with regard to the arrangement resolution, a high precision can be obtained along with the relative value precision of the RI.

Abstract: A display device and a color adjustment method thereof and a method for displaying video signals are provided. The display device includes a video signal receiver, a scaling engine, a color engine, an output stage, and a panel. The video signal receiver receives the video signals. The scaling engine is coupled to the video signal receiver to modulate the resolution of the video signal. The color engine is coupled to the scaling engine, which includes a local adjusting unit. The local adjusting unit adjusts hue, saturation, or intensity of a group of pixels, and thereby increase the quality of images. The output stage is coupled to the color engine, which outputs the adjusted video signals. The panel is coupled to the output stage, which displays the adjusted video signal.