Abstract: An optical communication transmitter includes a modulation circuit and a vertical cavity surface emitting laser (VCSEL) transmission module, The modulation circuit is used for performing a four-level pulse amplitude modulation (PAM4) on the input data in order to generate a modulation signal. The VCSEL transmission module is coupled to the modulation circuit and uses an injection lock technique to generate and transmit an output optical signal based on the modulation signal.

Abstract: A wireless optical communication system including an optical transmitter and an optical receiver is provided. The optical transmitter is configured to receive a first data, to perform modulation on the first data and to generate a data optical wave based on the modulated first data, wherein the optical transmitter applies a two-stage injection lock means for generating and emitting an output optical signal based on the data optical wave. The optical receiver is configured to receive the output optical signal, to convert the output optical signal into an electrical signal, followed by performing demodulation on the electrical signal in order to generate a second data corresponding to the first data. The configuration of an optical transmitter applied to the wireless optical communication system is also provided.

Abstract: A memory comprises a memory cell, a sense amplifier, and a control unit. The memory cell stores a first bit and a second bit. The sense amplifier senses a first cell current and a second cell current corresponding to the first and the second bits respectively with a voltage applying on the memory cell. The control unit determines a digital state of the first bit by comparing a first reference current with the first cell current or by comparing a reference data with a first delta current between the first cell current and the second cell current.

Abstract: A memory comprises a memory cell, a sense amplifier, and a control unit. The memory cell stores a first bit and a second bit. The sense amplifier senses a first cell current and a second cell current corresponding to the first and the second bits respectively with a voltage applying on the memory cell. The control unit determines a digital state of the first bit by comparing a first reference current with the first cell current or by comparing a reference data with a first delta current between the first cell current and the second cell current.