Patents by Inventor Chung-Yi Su

Chung-Yi Su has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230238241
    Abstract: A method includes forming a dummy gate stack on a semiconductor region, forming gate spacers on sidewalls of the dummy gate stack, removing the dummy gate stack to form a recess between the gate spacers, and forming a silicon oxide layer on the semiconductor region. The silicon oxide layer extends into the recess. A high-k dielectric layer is deposited over the silicon oxide layer, and a silicon layer is deposited over the high-k dielectric layer. The silicon layer extends into the recess. The high-k dielectric layer and the silicon layer are in-situ deposited in a same vacuum environment. The method further includes performing an annealing process on the silicon layer and the high-k dielectric layer, removing the silicon layer, and forming a gate electrode over the high-k dielectric layer. The gate electrode fills the recess.
    Type: Application
    Filed: May 12, 2022
    Publication date: July 27, 2023
    Inventors: Jyun-Yi Wu, Chung-Yi Su, Tsung-Da Lin, Chi On Chui
  • Publication number: 20220415721
    Abstract: The present disclosure describes a method for controlling radiation conditions and an example system for performing the method. The method includes sending a first setting to configure a radiation device to provide radiation to a substrate undergoing a process operation in a process chamber of the radiation device. The method further includes receiving radiation energy data measured at a plurality of locations of the process chamber and receiving measurement data measured on the substrate during the process operation. The method further includes in response to a variance of the radiation energy data being above a first predetermined threshold and in response to a difference between reference data and the measurement data being above a second predetermined threshold, sending a second setting to configure the radiation device to provide radiation to the substrate.
    Type: Application
    Filed: May 6, 2022
    Publication date: December 29, 2022
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yu-Chun TAI, Ta-Ching YANG, Chung-Yi SU, Ping-Cheng LU, Ming-Feng LEE
  • Patent number: 11075275
    Abstract: Certain embodiments of a semiconductor device and a method of forming a semiconductor device comprise forming a high-k gate dielectric layer over a short channel semiconductor fin. A work function metal layer is formed over the high-k gate dielectric layer. A seamless metal fill layer is conformally formed over the work function metal layer.
    Type: Grant
    Filed: March 1, 2018
    Date of Patent: July 27, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shih-Hang Chiu, Chung-Chiang Wu, Ching-Hwanq Su, Da-Yuan Lee, Ji-Cheng Chen, Kuan-Ting Liu, Tai-Wei Hwang, Chung-Yi Su
  • Patent number: 10581225
    Abstract: A light-emitting device includes a substrate having a first surface and an opposing second surface, and an epitaxial structure having a first surface and an opposing second surface. The second surface of the epitaxial structure is positioned in proximity with the first surface of the substrate. The light-emitting device includes a first metal layer having a first surface and an opposing second surface. The light-emitting device further includes at least one light confinement structure configured to confine light produced within the epitaxial structure. The at least one light confinement structure provides a low-refraction index boundary that confines the light in a mesa structure that is at least partially surrounded by the at least one light confinement structure. The at least one light confinement structure can also be arranged to create separate confinement regions to serve as bandwidth enhancement coupled cavities for the active region of the light-emitting device.
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: March 3, 2020
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventor: Chung-Yi Su
  • Publication number: 20190273145
    Abstract: Certain embodiments of a semiconductor device and a method of forming a semiconductor device comprise forming a high-k gate dielectric layer over a short channel semiconductor fin. A work function metal layer is formed over the high-k gate dielectric layer. A seamless metal fill layer is conformally formed over the work function metal layer.
    Type: Application
    Filed: March 1, 2018
    Publication date: September 5, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shih-Hang CHIU, Chung-Chiang WU, Ching-Hwanq SU, Da-Yuan LEE, Ji-Cheng CHEN, Kuan-Ting LIU, Tai-Wei HWANG, Chung-Yi SU
  • Patent number: 10270221
    Abstract: Optical devices and systems are depicted and described herein. One example of the optical system is disclosed to include a semiconductor layer, a first metal strip positioned adjacent to a first surface of the semiconductor layer, a second metal strip positioned adjacent to a second surface of the semiconductor layer that opposes the first surface of the semiconductor layer, and a third metal strip positioned adjacent to the second surface of the semiconductor layer. In one example, the first metal strip includes a first aperture positioned adjacent to a first active region in the semiconductor layer and second aperture positioned adjacent to a second active region in the semiconductor layer. The second metal strip overlaps the first metal strip in proximity with the first active region and not the second active region and the third metal strip is oriented substantially parallel with the second metal strip.
    Type: Grant
    Filed: April 27, 2018
    Date of Patent: April 23, 2019
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Tak Kui Wang, Chung-Yi Su
  • Patent number: 10156688
    Abstract: A passive alignment system is provided that comprises one or more first meltable elements disposed on a surface, one or more second meltable elements disposed on a surface and one or more first standoff devices. The first and second meltable elements transition from first and second pre-molten states, respectively, to first and second molten states, respectively, when subjected to first and second temperatures, respectively. In the first molten state, the first meltable elements control relative alignment between the surfaces in first and second dimensions. In the second molten state, the second meltable elements and the first standoff devices control relative alignment between the surfaces in a third dimension. The passive alignment system is suitable for use in a parallel optical communications module to precisely passively align ends of a plurality of optical fibers or waveguides with respective light sources or light detectors of the module.
    Type: Grant
    Filed: August 17, 2017
    Date of Patent: December 18, 2018
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Tak Kui Wang, Chung-Yi Su
  • Patent number: 10054749
    Abstract: An optical chip-scale package (CSP) is provided for use in a high channel density, high data rate communications system that has optical I/O ports and that is capable of being housed in a standard rackmount-sized box. The optical I/O ports comprise a bulkhead of multi-optical fiber (MF) adapters installed in a front panel of a switch box that houses the communications system. The adapters have first and second receptacles that are adapted to mate with first and second MF connectors, respectively. The communications system comprises a single-harness optical subassembly that uses a plurality of the optical CSPs that interface with a switch IC chip of the communications system to perform electrical-to-optical and optical-to-electrical conversion.
    Type: Grant
    Filed: April 28, 2017
    Date of Patent: August 21, 2018
    Assignee: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
    Inventors: Tak Kui Wang, Chung-Yi Su, Nick Jordache
  • Patent number: 10018787
    Abstract: A wavelength division multiplexing and demultiplexing (WDM) assembly is provided that is also capable of performing bidirectional communications. The WDM assembly comprises a WDM module and an adapter for use with the WDM module. The adapter has first and second receptacles in front and back ends thereof, respectively, that are configured to mate with a multi-fiber (MF) connector and with the WDM module, respectively. The MF connector holds ends of M optical fibers and the WDM module has M lenses. The WDM module holds ends of N optical fibers, where N is equal to or greater than 2M. When the MF connector and the WDM module are mated with the first and second receptacles, respectively, the ends of the M optical fibers held in the MF connector are in optical alignment with M lenses, respectively, disposed in the WDM module.
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: July 10, 2018
    Assignee: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
    Inventors: Tak Kui Wang, Chung-Yi Su
  • Patent number: 9925530
    Abstract: The present invention relates to a nanoporous thin film and a method for fabricating the same. The nanoporous thin film fabricating method for fabricating a nanoporous thin film with a composite photocatalyst structure for a photodegradation and a water purification includes providing a porous substrate with a plurality of through-nanopores therein, each of which through-nanopores have an inner tube wall; forming an oxide-based photocatalyst layer over the porous substrate and the inner tube wall by using a first chemical-based deposition process; and forming a metal-based photocatalyst layer on a part of the oxide-based photocatalyst layer by using a second chemical-based deposition process.
    Type: Grant
    Filed: August 27, 2015
    Date of Patent: March 27, 2018
    Assignee: NATIONAL TSING HUA UNIVERSITY
    Inventors: Tsong-Pyng Perng, Hsueh-Shih Chen, Chung-Yi Su, Po-Hsun Chen
  • Patent number: 9869833
    Abstract: A constructed photodetector, an optical receiver, and a receiver unit in an optical communication system are disclosed. One example of the disclosed constructed photodetector includes an optoelectronic element having an active area that converts light having a wavelength of interest into electrical signals and a substrate on a face that opposes the active area, where the substrate is non-transparent to light having the wavelength of interest. The constructed photodetector further includes a lens-chip that is at least partially transparent to light having the wavelength of interest, where the lens-chip includes a first side and an opposing second side, where the first side of the lens-chip includes an integrated lens, and where the second side of the lens-chip includes one or more electrical traces. The constructed photodetector further includes at least one connector that provides a physical and electrical connection between the optoelectronic element and the lens-chip.
    Type: Grant
    Filed: October 2, 2015
    Date of Patent: January 16, 2018
    Assignee: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
    Inventors: Tak Kui Wang, Ye Chen, Chung-Yi Su, Frank Yashar
  • Patent number: 9865983
    Abstract: A vertical cavity surface emitting laser (VCSEL) includes a substrate having an aperture that allows light generated in an active layer of the VCSEL to exit the VCSEL after propagation through a first set of semiconductor layers. The VCSEL further includes an opaque bottom layer that blocks light generated in the active layer and propagated through a second set of semiconductor layers. The opaque bottom layer can be attached to a heat sink for heat dissipation thereby allowing the VCSEL to be operated at high power levels. The active layer is sandwiched between the first set of semiconductor layers and the second set of semiconductor layers. Unlike a traditional VCSEL where only certain wavelengths of light can propagate through a solid substrate that is “transparent” to these particular wavelengths, the aperture provided in the substrate of a VCSEL in accordance with the disclosure allows for propagation of many different wavelengths.
    Type: Grant
    Filed: August 31, 2015
    Date of Patent: January 9, 2018
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Chung-Yi Su, Christine Chen
  • Patent number: 9739961
    Abstract: An optical communications system and a pluggable optical communications module for use in the system are provided. The configuration of the pluggable optical communications module is such that no optical turn in any light path is required. Embodiments of the optical communications module include an EMI shielding solution and an electrical interface for electrically interfacing an electrical subassembly (ESA) of the module with a system printed circuit board (PCB) in a way that obviates the need for an optical turn.
    Type: Grant
    Filed: March 31, 2015
    Date of Patent: August 22, 2017
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Tak Kui Wang, Chung-Yi Su
  • Patent number: 9728934
    Abstract: A wafer-to-wafer bonded arrangement is provided comprising a VCSEL wafer and a highly thermally-conductive (HTC) wafer that are bonded together with the front side of the VCSEL wafer bonded to the HTC wafer. The VCSEL wafer is fabricated to include, at least initially, a native substrate. The HTC wafer includes a thermally-conductive, non-native substrate. All or a portion of the native substrate may be removed after performing wafer-to-wafer bonding. In effect, the HTC wafer becomes the substrate of the bonded pair. During operation of VCSEL dies diced from the bonded wafer, heat generated by the dies flows into the non-native substrate where the heat spreads out and is dissipated. Laser light generated by the VCSEL die is emitted through the back side of the VCSEL die.
    Type: Grant
    Filed: August 31, 2015
    Date of Patent: August 8, 2017
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Tak Kui Wang, Chung-Yi Su
  • Patent number: 9620934
    Abstract: A known flip-chip assembly manufacturing process is augmented by process steps of the invention to create a VCSEL flip-chip assembly comprising a plurality of semiconductor devices having respective arrays of a small number of VCSELs thereon, which are mounted on a substrate to form a large array of VCSELs that are precisely optically aligned with their respective optical coupling elements.
    Type: Grant
    Filed: August 31, 2010
    Date of Patent: April 11, 2017
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Chung-Yi Su, Tak K. Wang
  • Publication number: 20170097480
    Abstract: A constructed photodetector, an optical receiver, and a receiver unit in an optical communication system are disclosed. One example of the disclosed constructed photodetector includes an optoelectronic element having an active area that converts light having a wavelength of interest into electrical signals and a substrate on a face that opposes the active area, where the substrate is non-transparent to light having the wavelength of interest. The constructed photodetector further includes a lens-chip that is at least partially transparent to light having the wavelength of interest, where the lens-chip includes a first side and an opposing second side, where the first side of the lens-chip includes an integrated lens, and where the second side of the lens-chip includes one or more electrical traces. The constructed photodetector further includes at least one connector that provides a physical and electrical connection between the optoelectronic element and the lens-chip.
    Type: Application
    Filed: October 2, 2015
    Publication date: April 6, 2017
    Inventors: Tak Kui Wang, Ye Chen, Chung-Yi Su, Frank Yashar
  • Publication number: 20170063035
    Abstract: A wafer-to-wafer bonded arrangement is provided comprising a VCSEL wafer and a highly thermally-conductive (HTC) wafer that are bonded together with the front side of the VCSEL wafer bonded to the HTC wafer. The VCSEL wafer is fabricated to include, at least initially, a native substrate. The HTC wafer includes a thermally-conductive, non-native substrate. All or a portion of the native substrate may be removed after performing wafer-to-wafer bonding. In effect, the HTC wafer becomes the substrate of the bonded pair. During operation of VCSEL dies diced from the bonded wafer, heat generated by the dies flows into the non-native substrate where the heat spreads out and is dissipated. Laser light generated by the VCSEL die is emitted through the back side of the VCSEL die.
    Type: Application
    Filed: August 31, 2015
    Publication date: March 2, 2017
    Inventors: Tak Kui Wang, Chung-Yi Su
  • Publication number: 20170063040
    Abstract: A vertical cavity surface emitting laser (VCSEL) includes a substrate having an aperture that allows light generated in an active layer of the VCSEL to exit the VCSEL after propagation through a first set of semiconductor layers. The VCSEL further includes an opaque bottom layer that blocks light generated in the active layer and propagated through a second set of semiconductor layers. The opaque bottom layer can be attached to a heat sink for heat dissipation thereby allowing the VCSEL to be operated at high power levels. The active layer is sandwiched between the first set of semiconductor layers and the second set of semiconductor layers. Unlike a traditional VCSEL where only certain wavelengths of light can propagate through a solid substrate that is “transparent” to these particular wavelengths, the aperture provided in the substrate of a VCSEL in accordance with the disclosure allows for propagation of many different wavelengths.
    Type: Application
    Filed: August 31, 2015
    Publication date: March 2, 2017
    Inventors: Chung-Yi Su, Christine Chen
  • Publication number: 20160291270
    Abstract: An optical communications system and a pluggable optical communications module for use in the system are provided. The configuration of the pluggable optical communications module is such that no optical turn in any light path is required. Embodiments of the optical communications module include an EMI shielding solution and an electrical interface for electrically interfacing an electrical subassembly (ESA) of the module with a system printed circuit board (PCB) in a way that obviates the need for an optical turn.
    Type: Application
    Filed: March 31, 2015
    Publication date: October 6, 2016
    Inventors: Tak Kui Wang, Chung-Yi Su
  • Patent number: 9397458
    Abstract: A connector assembly is provided that has optical communications capabilities and high data rate electrical communications capabilities and that is backwards compatible with one or more USB standards. A socket of the connector assembly has high data rate electrical connections and USB electrical connections such that it is capable of supporting high data rate signaling protocols for high data rate devices as well as USB signaling protocols. A plug of the connector assembly has high data rate electrical connections, USB electrical connections, and an optical-to-electrical (OE)/electrical-to-optical (EO) conversion module. The socket can be mated with the plug of the invention and with USB plugs that are compliant with existing USB plugs. Thus, both the socket and the plug have backwards compatibility with one or more existing USB standards.
    Type: Grant
    Filed: January 10, 2011
    Date of Patent: July 19, 2016
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Tak K. Wang, Chung-Yi Su