Abstract: A magnetic recording medium controllably textured by performing sputter etching or reactive ion etching either on the surface of a smooth substrate, which can be nickel-phosphorous/aluminum-magnesium (Al--Mg) substrate, or on the surface of a protective layer, such as a carbon overcoat. Both types of etching processes described above are carried out in a sputtering apparatus and have an etching mask of discrete hemi-spherical structures formed by the agglomeration of a low melting point metal or alloy such as indium or Pb--Sn, which has been deposited on a non-wetting surface such as the oxidized surface of NiP layer or the protective carbon overcoat prior to etching. The morphology of the textured surface can be controlled by adjusting the average thickness of the deposited masking materials, the gas composition, as well as the base pressure during etching.

Abstract: A method for making multilayer ceramic/glass substrates with electromagnetic shielding.

Abstract: A method of forming a bridge contact between a source diffusion region of a transfer gate FET and a polysilicon-filled trench storage capacitor electrodes of the FET. A layer of titanium is evaporated at a temperature of approximately 370.degree. C., so that the titanium has a substantially columnar grain structure and a minimum of matrix material. The bottom portions of the columnar grains have a lateral length that approximates the lateral length of the dielectric separating the source diffusion from the poly-filled trench. Thus, upon sintering at 700.degree. C. in an N.sub.2 atmosphere, titanium silicide will form over all exposed silicon regions as well as the dielectric, without shorting the FET electrodes together.

Abstract: A method for forming self-aligned via holes which are used to interconnect levels of thin films atop substrates. A first level thin film pattern, typically comprising raised metallic stripes, is formed atop the substrate. A first level dielectric material is then deposited in blanket fashion so that the topology of the insulator conforms to the topology of the pattern. Next, a material such as polymer is deposited which tends to form a planar surface, with a greater thickness of polymer accumulating between the protuberances of the insulator than atop said protuberances. A mask is then applied, exposed and developed at selected regions where via holes are to be formed in the dielectric. A small amount of the polymer is etched, preferably in a plasma, to expose the insulator. Then the latter is etched to form the via holes. Accurately located via holes are formed, even if the mask is misaligned.