Patents by Inventor Chunsheng Jiang

Chunsheng Jiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10204779
    Abstract: The present invention provides a thin film transistor and a manufacturing method thereof, an array substrate comprising the thin film transistor and a manufacturing method thereof, and a display apparatus comprising the array substrate. The manufacturing method of the thin film transistor comprises steps of forming a gate, a gate insulating layer, a semiconductor active layer, a source and a drain on a substrate, wherein the steps of forming the gate insulating layer and the semiconductor active layer comprise: preparing an insulating film, the insulating film comprises metal oxide insulating material; performing ion implantation on a predefined region of the insulating film, so that the metal oxide insulating material of partial-thickness of the insulating film in the predefined region is transformed into metal oxide semiconductor material to form the semiconductor active layer, and the rest of the insulating film forms the gate insulating layer.
    Type: Grant
    Filed: August 12, 2015
    Date of Patent: February 12, 2019
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Wei Liu, Chunsheng Jiang
  • Publication number: 20190027548
    Abstract: A method for manufacturing an array substrate of an AMOLED device includes steps of providing a substrate, depositing an amorphous silicon layer on the substrate, patterning the amorphous silicon layer, depositing a photoresist, patterning the photoresist, performing an ion implantation on a thin film transistor, depositing a gate insulating layer and a gate metal layer on the substrate, depositing an interlayer dielectric layer on the substrate, depositing an electrode metal layer on the substrate, depositing an inorganic protective layer on the substrate, and sequentially depositing an electron injecting layer and an electron transporting layer on the substrate.
    Type: Application
    Filed: September 11, 2017
    Publication date: January 24, 2019
    Inventor: Chunsheng JIANG
  • Patent number: 10170504
    Abstract: Embodiments of the disclosure provide a manufacturing method of a TFT array substrate, a TFT array substrate and a display device. The TFT array substrate comprises a thin film transistor and a pixel electrode formed on a base substrate, the pixel electrode is electrically connected with a drain electrode of the thin film transistor. The array substrate further comprises an light-shielding pattern provided above the thin film transistor.
    Type: Grant
    Filed: October 11, 2016
    Date of Patent: January 1, 2019
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Shi Shu, Guanbao Hui, Teng Ye, Chunsheng Jiang, Cuili Gai
  • Publication number: 20180358468
    Abstract: The present disclosure proposes a fabrication method of a thin film transistor, an array substrate, and a liquid crystal display panel. The fabrication method includes: forming a metallic oxide semiconductor layer on a substrate, forming a gate insulating layer on the channel of the metallic oxide semiconductor layer, and forming a gate on the gate insulating layer, and etching the source area and the drain area of the metallic oxide semiconductor layer with a metallic etching solution to transform the metallic oxide semiconductor layer at the source area and the drain area into a conductor, removing the metallic etching solution, and continuously depositing an interlayer insulating layer, a source, a drain, a passivation layer, and a pixel electrode successively. Because the metallic elements are removed from the metallic oxide semiconductor, the stability of the metallic oxide conductor and the performance of the TFT are enhanced.
    Type: Application
    Filed: July 21, 2017
    Publication date: December 13, 2018
    Applicant: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
    Inventors: Chunsheng JIANG, Yue WU
  • Publication number: 20180301478
    Abstract: A manufacturing method for an array substrate is provided. The manufacturing method includes steps of: forming a first metal layer, a gate electrode layer, a gate electrode insulated layer, a semiconductor layer, a second metal layer, a source electrode layer, and a drain electrode layer on a base substrate in order. The step of forming the gate electrode layer on the first metal layer further includes steps of: depositing a gate electrode metal layer; exposing, developing, and wet etching on the gate electrode metal layer; and removing a photoresist layer. Metal cations are added into a stripper liquid, an electrochemical corrosion potential of which is less than that of the first metal layer, so as to avoid a short line problem.
    Type: Application
    Filed: November 28, 2017
    Publication date: October 18, 2018
    Inventors: Chunsheng JIANG, Yue WU
  • Patent number: 10068955
    Abstract: A manufacturing method of an array substrate of an OLED display device is provided. Active areas of a first thin film transistor T1 and a second thin film transistor T2 are formed by a first mask; channel doping areas, source electrode doping areas and drain electrode doping areas of T1 and T2 are formed by a second mask; gate electrodes of T1 and T2 are formed by a third mask; vias are formed by a fourth mask; source electrodes and drain electrodes of T1 and T2, a data line and a pixel electrode are formed by a fifth mask. The manufacturing method can simplify the process steps.
    Type: Grant
    Filed: January 13, 2017
    Date of Patent: September 4, 2018
    Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventor: Chunsheng Jiang
  • Publication number: 20180212010
    Abstract: A manufacturing method of an array substrate of an OLED display device is provided. Active areas of a first thin film transistor T1 and a second thin film transistor T2 are formed by a first mask; channel doping areas, source electrode doping areas and drain electrode doping areas of T1 and T2 are formed by a second mask; gate electrodes of T1 and T2 are formed by a third mask; vias are formed by a fourth mask; source electrodes and drain electrodes of T1 and T2, a data line and a pixel electrode are formed by a fifth mask. The manufacturing method can simplify the process steps.
    Type: Application
    Filed: January 13, 2017
    Publication date: July 26, 2018
    Applicant: SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventor: Chunsheng JIANG
  • Patent number: 9960189
    Abstract: A thin film transistor and a manufacturing method thereof, an array substrate and a display device are provided. The method includes forming a gate electrode, a gate insulating layer, a metal oxide semiconductor (MOS) active layer, a source electrode and a drain electrode on a substrate. The MOS active layer includes forming a pattern layer of indium oxide series binary metal oxide including a first pattern directly contacting with the source electrode and the drain electrode. An insulating layer formed over the source electrode and the drain electrode acts as a protection layer, the pattern layer of indium oxide series binary metal oxide is implanted with metal doping ions by using an ion implanting process, and is annealed, so that the indium oxide series binary metal oxide of the third pattern is converted into the indium oxide series multiple metal oxide to form the MOS active layer.
    Type: Grant
    Filed: February 17, 2017
    Date of Patent: May 1, 2018
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Ce Zhao, Chunsheng Jiang, Guangcai Yuan
  • Patent number: 9935162
    Abstract: An embodiment of the present disclosure provides an organic electroluminescent transistor array substrate, including a substrate, and a gate layer, a gate insulating layer, a semiconductor layer, a source layer, a pixel defining layer, an electroluminescent layer and a drain layer formed on the substrate, wherein, the source layer and the drain layer are located in different levels, the source layer includes plural source electrode units corresponding to sub-pixel units respectively, the pixel defining layer includes plural pixel defining units corresponding to the source electrode units respectively, and the respective source electrode units are embedded within the pixel defining units corresponding thereto.
    Type: Grant
    Filed: June 2, 2016
    Date of Patent: April 3, 2018
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xuyuan Li, Liqiang Chen, Chunsheng Jiang, Changcheng Xu
  • Patent number: 9917203
    Abstract: A thin film transistor, a manufacturing method thereof, an array substrate and a display apparatus are disclosed. The manufacturing method includes forming a gate electrode (2), a gate insulating layer (3), an active region (4), a source electrode (5) and a drain electrode (6) on a base substrate (1) with the active region being formed of ZnON material, and implanting the active region (4) with nitrogen ion while it being formed, so as to make the sub-threshold swing amplitude of the thin film transistor less than or equal to 0.5 mV/dec. The manufacturing method reduces the sub-threshold swing amplitude of the thin film transistor and improves the semiconductor characteristics of the thin film transistor.
    Type: Grant
    Filed: November 21, 2014
    Date of Patent: March 13, 2018
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Chunsheng Jiang, Lung Pao Hsin
  • Patent number: 9911394
    Abstract: The present disclosure discloses a method and an apparatus for controlling image display, which achieve uniformity of image display and remove the image-retention in a compensation manner of high precision, high efficiency and low cost. The method for controlling image display comprises: reading gray scales of all sub-pixels of a current frame image displayed by a display device; determining an ideal luminance corresponding to the gray scale according to a predetermined ideal corresponding relationship between the gray scales and luminance of respective sub-pixels respectively; determining an adjusted gray scale corresponding to the ideal luminance according to the predetermined original corresponding relationship between the gray scales and the luminance of respective sub-pixels respectively; driving the display device to display the current frame image according to the adjusted gray scale.
    Type: Grant
    Filed: August 12, 2013
    Date of Patent: March 6, 2018
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Zhongyuan Wu, Haijing Chen, Chunsheng Jiang
  • Patent number: 9899532
    Abstract: A thin-film transistor (TFT) and a manufacturing method thereof, an array substrate and a manufacturing method thereof, and a display apparatus are provided. The method for manufacturing the TFT includes: forming a gate electrode, a gate insulating layer, a metal oxide semiconductor active layer, a source electrode and a drain electrode on a substrate; the forming the metal oxide semiconductor active layer includes: forming the metal oxide semiconductor active layer by electrochemical reaction. The method for manufacturing the TFT is applied in the production of the TFT and the array substrate and the display apparatus comprising the TFTs and provides a new method for forming the metal oxide semiconductor active layer.
    Type: Grant
    Filed: June 19, 2015
    Date of Patent: February 20, 2018
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Chunsheng Jiang, Xuyuan Li, Wei Liu
  • Patent number: 9882172
    Abstract: Disclosed are an OLED backplane and fabrication method. The fabrication method comprises: forming a pattern including a TFT on a substrate; forming a passivation layer on the substrate including the TFT pattern; forming a color filter on the substrate including the passivation layer; forming a resin layer on the substrate including the color filter; heavily doping the resin layer of a first region in each sub-pixel on the substrate including the resin layer, the resin layer in the first region being conductive, the first region including a passivation layer via-hole region, a pixel electrode region and a connecting region between the passivation layer via-hole region and the pixel electrode region, the passivation-layer via-hole region being a position where a drain electrode of the TFT is located; and forming an organic light-emitting layer and a cathode sequentially on the substrate after the resin layer of the first region is heavily doped.
    Type: Grant
    Filed: July 25, 2014
    Date of Patent: January 30, 2018
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Chunsheng Jiang, Jingfei Fang, Wei Liu
  • Patent number: 9837477
    Abstract: Embodiments of the invention provide an array substrate and a method of manufacturing the same. The method comprises: forming a gate electrode pattern, a gate insulation layer, an active layer pattern and an etching stopping layer on a substrate; forming a photoresist layer on the etching stopping layer; performing a single patterning process on the photoresist layer, such that photoresist in the first region is partially etched off, photoresist in the second region is completely etched off, and photoresist in the third region is completely remained; and performing a single etching process, such that residual photoresist in the first region and a portion of the etching stopping layer in the first region are etched off, and at the same time, a portion of the etching stopping layer and a portion of the gate insulation layer in the second region are etched off.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: December 5, 2017
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Jiangbo Chen, Jun Cheng, Chunsheng Jiang, Xiaodi Liu, Xiangyong Kong
  • Patent number: 9825175
    Abstract: A thin film transistor and a fabrication method thereof, an array substrate and a display device are provided. The thin film transistor includes: an active layer, a source-drain metal layer and a diffusion blocking layer located between the active layer and the source-drain metal layer, wherein, the source-drain metal layer includes a source electrode and a drain electrode; the diffusion blocking layer includes a source blocking part corresponding to a position of the source electrode and a drain blocking part corresponding to a position of the drain electrode; and the diffusion blocking layer is doped with different concentrations of nitrogen from a side close to the source-drain metal layer to a side close to the active layer.
    Type: Grant
    Filed: August 14, 2015
    Date of Patent: November 21, 2017
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Wei Liu, Chunsheng Jiang, Lung Pao Hsin
  • Publication number: 20170256621
    Abstract: A thin film transistor, a method for fabricating the same, an array substrate, and a display device are provided. The thin film transistor comprises a copper gate, a gate insulating layer, an active layer, a source, and a drain. The thin film transistor further comprises a copper alloy layer which is arranged on a side of the gate facing the active layer.
    Type: Application
    Filed: March 7, 2016
    Publication date: September 7, 2017
    Inventors: Chunsheng Jiang, Xuyuan Li, Wei Liu, Xiaming Zhu
  • Publication number: 20170250076
    Abstract: The present invention provides a thin film transistor and a manufacturing method thereof, an array substrate comprising the thin film transistor and a manufacturing method thereof, and a display apparatus comprising the array substrate. The manufacturing method of the thin film transistor comprises steps of forming a gate, a gate insulating layer, a semiconductor active layer, a source and a drain on a substrate, wherein the steps of forming the gate insulating layer and the semiconductor active layer comprise: preparing an insulating film, the insulating film comprises metal oxide insulating material; performing ion implantation on a predefined region of the insulating film, so that the metal oxide insulating material of partial-thickness of the insulating film in the predefined region is transformed into metal oxide semiconductor material to form the semiconductor active layer, and the rest of the insulating film forms the gate insulating layer.
    Type: Application
    Filed: August 12, 2015
    Publication date: August 31, 2017
    Inventors: Wei LIU, Chunsheng JIANG
  • Patent number: 9741750
    Abstract: A thin film transistor, a pixel structure, an array substrate, a display device, a method for manufacturing a thin film transistor, and a method for manufacturing a pixel structure are disclosed. The thin film transistor includes a gate electrode, a source electrode and a drain electrode, wherein a first passivation layer made from an aluminum oxide material is provided on the source electrode and the drain electrode, and an active layer made from an aluminum oxide material doped with ions is provided in a region of the first passivation layer corresponding to the gate electrode. Since the first passivation layer as insulation material is doped with the ions to form an active layer, the etching stop layer may be omitted, thereby simplifying the structure of the thin film transistor.
    Type: Grant
    Filed: September 8, 2015
    Date of Patent: August 22, 2017
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventor: Chunsheng Jiang
  • Patent number: 9711653
    Abstract: Embodiments of the present invention provide a thin film transistor, method for fabricating the thin film transistor and display apparatus. The method includes steps of: forming an active layer pattern which has a mobility greater than a predetermined threshold from an active layer material; and performing ion implantation on the active layer pattern. The energy of a compound bond formed from the implanted ions is greater than that of a compound bond formed from ions in the active layer material, thereby reducing the chance of vacancy formation and reducing the carrier concentration. Therefore, the mobility of the active layer surface is reduced, the leakage current is reduced, the threshold voltage is adjusted to shift toward positive direction and performance of the thin film transistor is improved.
    Type: Grant
    Filed: June 20, 2014
    Date of Patent: July 18, 2017
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Meili Wang, Chunsheng Jiang, Dongfang Wang, Fengjuan Liu
  • Patent number: 9704998
    Abstract: The present invention discloses a thin film transistor, a method of manufacturing the thin film transistor, a display substrate and a display apparatus.
    Type: Grant
    Filed: August 19, 2014
    Date of Patent: July 11, 2017
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Jingfei Fang, Chunsheng Jiang