Abstract: An interconnect structure for a semiconductor device and its method of manufacture is described. The interconnect structure comprises a multi-layer structure having one or more stress-relief layers. In an embodiment, stress-relief layers are positioned between layers of electroplated copper or other conductive material. The stress-relief layer counteracts stress induced by the conductive material and helps prevent or reduce a pull-back void. For an interconnect structure using electroplated copper, the stress-relief layer may be formed by temporarily reducing the electroplating current, thereby causing a thin film of copper having a larger grain size to be formed between other layers of copper. The larger grain size typically exhibits more of a compressive stress than copper with a smaller grain size. The stress relief layer may also be formed of other materials, such as SIP-Cu, Ta, SiC, or the like.

Abstract: A method for forming a metal layer having a predetermined thickness on an underlying material is disclosed. According to the method, the underlying material is electroplated to form the metal layer having a fraction of the predetermined thickness thereon. The step of electroplating is interrupted for a predetermined period of time. The step of electroplating is then resumed to form the metal layer having the predetermined thickness on the underlying material, thereby improving planarity of the metal layer.

Abstract: A fabrication system. A plating tool generates a layer of conductive material on a substrate. A polishing tool uses a mechanical mechanism to remove the conductive material from the substrate. A metrology tool measures an electromagnetic signal induced in the conductive material using a non-destructive testing mechanism. A controller, coupled to the polishing and metrology tools, determines residue thickness and removal rate of the conductive material during the polishing process according to the measured electromagnetic signal, and adjusts process parameters for the plating and polishing tools accordingly.

Abstract: A high power, high luminous flux light emitting diode (LED) comprises a substrate, a light-emitting structure, a first electrode and a second electrode. The LED has a top surface layout design in which the first electrode has a number of legs extending in one direction, and the second electrode has a number of legs extending in the opposite direction. At least portions of the legs of the first electrode are interspersed with and spaced apart from portions of the legs of the second electrode. This provides a configuration that enhances current spreading along the length of the legs of both electrodes.

Abstract: A high power, high luminous flux light emitting diode (LED) comprises a substrate, a light-emitting structure, a first electrode and a second electrode. The LED has a top surface layout design in which the first electrode has a number of legs extending in one direction, and the second electrode has a number of legs extending in the opposite direction. At least portions of the legs of the first electrode are interspersed with and spaced apart from portions of the legs of the second electrode. This provides a configuration that enhances current spreading along the length of the legs of both electrodes.

Abstract: The construction of a film on a wafer, which is placed in a processing chamber, may be carried out through the following steps. A layer of material is deposited on the wafer. Next, the layer of material is annealed. Once the annealing is completed, the material may be oxidized. Alternatively, the material may be exposed to a silicon gas once the annealing is completed. The deposition, annealing, and either oxidation or silicon gas exposure may all be carried out in the same chamber, without need for removing the wafer from the chamber until all three steps are completed. A semiconductor wafer processing chamber for carrying out such an in-situ construction may include a processing chamber, a showerhead, a wafer support and a rf signal means. The showerhead supplies gases into the processing chamber, while the wafer support supports a wafer in the processing chamber.

Abstract: The construction of a film on a wafer, which is placed in a processing chamber, may be carried out through the following steps. A layer of material is deposited on the wafer. Next, the layer of material is annealed. Once the annealing is completed, the material may be oxidized. Alternatively, the material may be exposed to a silicon gas once the annealing is completed. The deposition, annealing, and either oxidation or silicon gas exposure may all be carried out in the same chamber, without need for removing the wafer from the chamber until all three steps are completed. A semiconductor wafer processing chamber for carrying out such an in-situ construction may include a processing chamber, a showerhead, a wafer support and a rf signal means. The showerhead supplies gases into the processing chamber, while the wafer support supports a wafer in the processing chamber.

Abstract: A structure is formed in an integrated circuit to provide for the coupling of elements in the integrated circuit. The structure extends from a conductive surface through a channel extending above the conductive surface. The structure includes a layer of a refractory metal, a layer of a metal nitride, and a layer of a metal. The layer of the refractory metal is deposited on the conductive surface and inner walls of the channel. The layer of the metal nitride is formed on the layer of the refractory metal. The layer of the metal nitride has a thickness extending from the layer of the refractory metal of less than 130 Å. The layer of the metal is deposited on the layer of the metal nitride.

Abstract: The construction of a film on a wafer, which is placed in a processing chamber, may be carried out through the following steps. A layer of material is deposited on the wafer. Next, the layer of material is annealed. Once the annealing is completed, the material may be oxidized. Alternatively, the material may be exposed to a silicon gas once the annealing is completed. The deposition, annealing, and either oxidation or silicon gas exposure may all be carried out in the same chamber, without need for removing the wafer from the chamber until all three steps are completed. A semiconductor wafer processing chamber for carrying out such an in-situ construction may include a processing chamber, a showerhead, a wafer support and a rf signal means. The showerhead supplies gases into the processing chamber, while the wafer support supports a wafer in the processing chamber.

Abstract: A layer of material is formed on a substrate in a partially formed integrated circuit on a wafer. The substrate undergoes a plasma annealing, during which the substrate is bombarded with ions. The plasma annealing may be performed by exposing the substrate to plasma that is generated from a nitrogen containing gas which is infused with energy. After the substrate is plasma annealed, a layer of a refractory metal nitride is deposited on the substrate. The layer of refractory metal nitride is then bombarded with a first set of ions. The bombardment of the refractory metal by the first set of ions may be achieved by performing a plasma annealing. The refractory metal nitride may be further bombarded by a second set of ions.

Abstract: The construction of a film on a wafer, which is placed in a processing chamber, may be carried out through the following steps. A layer of material is deposited on the wafer. Next, the layer of material is annealed. Once the annealing is completed, the material may be oxidized. Alternatively, the material may be exposed to a silicon gas once the annealing is completed. The deposition, annealing, and either oxidation or silicon gas exposure may all be carried out in the same chamber, without need for removing the wafer from the chamber until all three steps are completed. A semiconductor wafer processing chamber for carrying out such an in-situ construction may include a processing chamber, a showerhead, a wafer support and a rf signal means. The showerhead supplies gases into the processing chamber, while the wafer support supports a wafer in the processing chamber.

Abstract: A method for improving the characteristics of deposited thin films by improved control and stabilization of wafer surface temperatures. Further, the invention provides the ability to rapidly change the temperature of the wafer surface without the need to change the temperature of the chamber. The wafer is heated to an operating temperature by conventional means. A gas with high thermal conductivity, such as helium or hydrogen, is passed over the wafer to cool its surface to a desired temperature for the process to be performed. The flow rate is then adjusted to stabilize the temperature of the wafer and reduce surface temperature variations. Processing gases are then introduced into the chamber, and deposition onto the wafer commences. The maintenance of correct wafer surface temperature results in improved step coverage and conformality of the deposited film.