Abstract: A ferroelectric space charge capacitor memory device includes a ferroelectric dielectric having a plurality of polarization states; a first electrode attached to the dielectric and establishing a first electric contact potential between the first electrode and the dielectric and a second electrode spaced from the first electrode and attached to the dielectric and establishing a second electric contact potential between the second electrode and the dielectric for generating a differential internal bias voltage on the dielectric which defines a number of capacitive levels, one representative of each of a corresponding number of polarization states and produces an electrical field which is less than the coercive electric field of the dielectric.

Abstract: A ferroelectric space charge capacitor memory device includes a pair of spaced first and second electrodes; a ferroelectric dielectric disposed between the electrodes; a coercive voltage supply for applying a coercive voltage to the dielectric to write the dielectric into one of two polarization states and to establish in each polarization state in the dielectric a space charge region proximate each electrode having a charge opposite to that of the electrode with a neutral region between the space charge regions, the relative sizes of the neutral and space charge regions defining the capacitance of the dielectric, the neutral region having an internal polarization field opposite to that represented by the space charge regions; a bias voltage supply for applying to the dielectric a bias voltage less than the coercive voltage at a rate lower than the rate of space charge formation to define a capacitance level representative of one of the polarization states; a pulse generator for introducing to the dielectric

Abstract: A linearized ferroelectric capacitor includes a ferroelectric dielectric medium; a doped region in the ferroelectric dielectric medium, the doped region having a charge of a first polarity which divides the medium into two sections of opposing polarized domains; and a pair of electrodes on the ferroelectric medium having a contact potential of a second, opposite polarity to that of the doped region for reinforcing and stabilizing the polarized domains in each section.

Abstract: A ferroelectric space charge capacitor analog memory device includes a pair of spaced first and second electrodes; a ferroelectric dielectric disposed between the electrodes; and a signal source for applying to the dielectric a write signal equal to or greater than the coercive voltage to write the dielectric into a predetermined polarization state in the range from zero to maximum coerced polarization and to establish, proximate the interface between the dielectric and each electrode, a space charge region having a charge opposite to that applied to the electrode, with a neutral region between the space charge regions, the relative sizes of the neutral and space charge regions defining the capacitance of the dielectric, the neutral region having an internal polarization field opposite to that represented by the space charge regions; a bias source for applying to the dielectric a bias voltage less than the coercive voltage at a rate slower than the rate of space charge formation to define the capacitance leve

Abstract: A ferroelectric space charge capacitor memory system includes a ferroelectric space charge capacitor memory cell having two ferroelectric space charge capacitor memory devices; a write circuit for applying coercive write voltage to each of the memory devices to establish internal polarization fields and space charge regions of opposite polarity in each device, respectively; a bias voltage circuit for applying to each of the devices a bias voltage less than the coercive voltage at a rate slower than the rate of space charge formation to define a capacitive level representative of one of the polarization states; a read signal circuit for introducing to each of the devices a read signal at a rate faster than the rate of space charge formation, which together with the bias voltage is less than the coercive voltage; and a detector responsive to the read signal for indicating the difference in charge transferred by each memory device representing the logical state of the memory cell.

Abstract: A ferroelectric space charge capacitor memory system includes a ferroelectric space charge capacitor memory cell having two ferroelectric space charge capacitor memory devices; means for applying coercive write voltage to each of the memory devices to establish internal polarization fields and space charge regions of opposite polarity in each device, respectively; means for applying to each of the devices a bias voltage less than the coercive voltage at a rate slower than the rate of space charge formation to define a capacitive level representative of one of the polarization states; means for introducing to each of the devices a read signal at a rate faster than the rate of space charge formation, which together with the bias voltage is less than the coercive voltage; and means responsive to the read signal for indicating the difference in charge transferred by each memory device representing the logical state of the memory cell.

Abstract: A ferroelectric space charge capacitor memory device includes a pair of spaced first and second electrodes; a ferroelectric dielectric disposed between the electrodes; means for applying a coercive voltage to the dielectric to write the dielectric into one of two polarization states and to establish in each polarization state in the dielectric a space charge region proximate each electrode having a charge opposite to that of the electrode with a neutral region between the space charge regions, the relative sizes of the neutral and space charge regions defining the capacitance of the dielectric, the neutral region having an internal polarization field opposite to that represented by the space charge regions; means for applying to the dielectric a bias voltage less than the coercive voltage at a rate lower than the rate of space charge formation to define a capacitance level representative of one of the polarization states; means for introducing to the dielectric a read signal at a rate faster than the rate of