Abstract: A pulsed drive signal without a dead band can be achieved by a drive circuit arranged to receive opposite pulsed input signals, having a dead band between them, a transformer arranged to receive the input signals and output intermediary signals, time delay circuitry arranged to receive the intermediary signals, and to provide buffer input signals, corresponding to the intermediary signals, but with a ramped up transition from a low to a high signal, a first and a second buffer stage arranged to receive the first and second buffer input signals, respectively, and produce the first and the second drive output signal corresponding to the first and second pulsed input signal but with the transition from a high to a low signal delayed to reduce the dead band.

Abstract: A pulsed drive signal without a dead band can be achieved by a drive circuit arranged to receive opposite pulsed input signals (PWM drive A, PWM drive B), having a dead band between them,—a transformer arranged to receive the input signals (PWM drive A, PWM drive B) and output intermediary signals (A?, B?),—time delay circuitry (RA, DA, RB, DB) arranged to receive the intermediary signals, and to provide buffer input signals (A?, B?), corresponding to the intermediary signals, but with a ramped up transition from low to high signal,—a first and a second buffer stage arranged to receive the first and second buffer input signals, respectively, and produce the first and the second drive output signal corresponding to the first and second pulsed input signal but with the transition from high to low signal delayed to reduce the dead band.

Abstract: The present invention provides a method for preventing a fault condition in a DC-DC converter (10, 20, 50) having a first secondary winding (Ns1) coupled to a first synchronous rectifier (SQ1) and a second secondary winding (Ns2) coupled to a second synchronous rectifier (SQ2). The first synchronous rectifier (SQ1) is turned on based on a voltage across the first secondary winding (Ns1) and is turned off based on a first driver signal. The second synchronous rectifier (SQ2) is turned on based on a voltage across the second secondary winding (Ns2) and is turned off based on a second driver signal. The present invention also provides a DC-DC converter (10, 20, 50) wherein a first control circuit is coupled to and controls the first synchronous rectifier (SQ1) pursuant to the method described above, and a second control circuit is coupled to and controls the second synchronous rectifier (SQ2) pursuant to the method described above.

Abstract: In a continuous mode flyback converter an FET transistor (110) is provided for reducing the voltage drop at the secondary side of the transformer. The use of the FET transistor makes the converter more suitable for low voltage applications since smaller power losses are imposed in the secondary side of the converter than in a conventional converter. The converter also has a DC-blocking capacitor (117) for further reducing the power losses at the secondary side.

Abstract: The present invention provides a method for preventing a fault condition in a DC-DC converter (10, 20, 50) having a first secondary winding (Ns1) coupled to a first synchronous rectifier (SQ1) and a second secondary winding (Ns2) coupled to a second synchronous rectifier (SQ2). The first synchronous rectifier (SQ1) is turned on based on a voltage across the first secondary winding (Ns1) and is turned off based on a first driver signal. The second synchronous rectifier (SQ2) is turned on based on a voltage across the second secondary winding (Ns2) and is turned off based on a second driver signal. The present invention also provides a DC-DC converter (10, 20, 50) wherein a first control circuit is coupled to and controls the first synchronous rectifier (SQ1) pursuant to the method described above, and a second control circuit is coupled to and controls the second synchronous rectifier (SQ2) pursuant to the method described above.

Abstract: A self-driven synchronous rectifier circuit (50) for a DC—DC power converter. The circuit comprises a primary transformer (16), a first synchronous rectifier (SQ1) coupled to the primary transformer (16), a second synchronous rectifier (SQ2) coupled to the primary transformer (16), an external drive circuit (18). The circuit (50) also comprises a plurality of switches (SQ3, SQ4) controllably coupled to second synchronous rectifier (SQ2). The external drive circuit (18) provides turn-off signaling for both synchronous rectifiers (SQ1, SQ2) Turn-on signaling provided for first synchronous rectifier (SQ1) by the primary transformer (16) turn-on signaling for second synchronous rectifier (SQ2) is provided by the external drive circuit (18).

Abstract: A D.C.--D.C. down converter utilizes a controlled converter primary switching circuit and a full-wave rectified secondary circuit employing synchronous rectification. An isolation transformer having split first and second secondary windings supplies current to the full-wave secondary circuit. The gating signals for synchronous rectification are produced by a switch conduction control including a secondary switch control receiving control signals from the primary switch control through a control current isolating transformer. The secondary switch control is powered by the secondary converter circuit. Through the use of a split secondary winding of the isolation transformer and a full-wave rectifying circuit, the secondary converter circuit of the D.C.--D.C. converter may readily generate drive voltages for supply to the secondary switch control, allowing the secondary converter circuit and load to be fully isolated from the primary converter circuit and input source.