Abstract: Embodiments of the present invention detect a device's ability to run at a particular frequency on a PCI bus operating in a non-inhibit bus mode. In one embodiment, expansion slots are powered on, connected to the PCI bus and reset. The expansion slots are then disconnected from the PCI bus while power is applied. A frequency detection algorithm, which is operable regardless of the inhibit bus connect setting or capability, is executed. The expansion slots are then reconnected to the PCI bus.

Abstract: Embodiments of the present invention detect a device's ability to run at a particular frequency on a PCI bus operating in a non-inhibit bus mode. In one embodiment, expansion slots are powered on, connected to the PCI bus and reset. The expansion slots are then disconnected from the PCI bus while power is applied. A frequency detection algorithm, which is operable regardless of the inhibit bus connect setting or capability, is executed. The expansion slots are then reconnected to the PCI bus.

Abstract: A nonvolatile memory having a plurality of individually erasable blocks is used to store sectors of a file. A method of overwriting the file includes the step of receiving a frame of data. The logical sector that the frame is to be written to is determined. The logical sector corresponds to a first sector located at a first offset in a first block of the nonvolatile memory. The first block also has an associated first logical block number. The frame of data is written to a second sector. The second sector is located at a second offset in a spare block. The first and second offsets are identical. The logical block number of the spare block is updated to be the same as the first logical block number.

Abstract: A peripheral device for use in interfacing with a system. The peripheral device contains driver code stored in memory locations within the peripheral device. The driver code is uncompiled, and, when read by a system to which the peripheral device is coupled, enables the system to interface with the peripheral device.

Abstract: A storage system contains a solid state disk drive having a plurality of memory cells to store the files, including file system control information and data. In a high density mode, the solid state disk drive stores more than one bit per memory cell, and in a reliable mode, the solid state disk drive stores one bit per cell. A file configuration system stores file system control information in the reliable mode and stores data, when specified, in the high density mode. The file configuration system includes a multi-level cell extension unit that generates commands to the memory cells. A data compression unit is provided to compress file data. A block size for the data compression unit is calculated in accordance with the number of bits per cell stored in the high density mode. The file configuration system further includes an error detection and correction (EDC) unit to detect and correct data stored in the high density mode.