Abstract: Techniques, for secure processing of encrypted data on public resources, include receiving first data, indicating a sequence of reversible Boolean function control (BFC) gates, including a first segment for decrypting, a second segment for operating on the decrypted data, and a third segment for encrypting the resulting data. Second data indicates generic BFC gate rules for replacing a first sequence of two gates operating on an input N-bit word with a second sequence of one or more gates that produce the same output N-bit word. The second data is used to propagate: a gate from the first segment a distance into the second segment or beyond; and, a gate from the third segment a distance into the second segment or before. This produces an obfuscated sequence of reversible gates. Obfuscated instructions based on the obfuscated sequence of gates are sent to the public resources.

Abstract: Techniques, for secure processing of encrypted data on public resources, include receiving first data indicating a sequence of reversible q-bit gates including a first segment for decrypting, a second segment for operating on the decrypted data, and a third segment for encrypting the resulting data. Second data indicates rules for replacing a first sequence of two gates operating on at least one shared bit of an input N-bit word with a different second sequence of one or more gates that produce the same output N-bit word. The second data is used to propagate: a gate from the first segment a distance into the second segment or beyond; and, a gate from the third segment a distance into the second segment or before. This produces an obfuscated sequence of reversible gates. Obfuscated instructions based on the obfuscated sequence of gates are sent to the public resources.

Abstract: Techniques, for secure processing of encrypted data on public resources, include receiving first data indicating a sequence of reversible q-bit gates including a first segment for decrypting, a second segment for operating on the decrypted data, and a third segment for encrypting the resulting data. Second data indicates rules for replacing a first sequence of two gates operating on at least one shared bit of an input N-bit word with a different second sequence of one or more gates that produce the same output N-bit word. The second data is used to propagate: a gate from the first segment a distance into the second segment or beyond; and, a gate from the third segment a distance into the second segment or before. This produces an obfuscated sequence of reversible gates. Obfuscated instructions based on the obfuscated sequence of gates are sent to the public resources.

Abstract: Methods for performing computations using a lattice of interconnected devices are described. The lattice is programmed to perform the computation by choosing a specific logic function for each device. An energy penalty is attributed to each device when the associated input and output bits do not satisfy a truth table of the logic function of the device. Input data is inserted on the boundaries of the lattice by attributing energy penalties to the input and output bits at the boundaries when the states of those bits do not match the input data. The energy in the lattice is lowered for the lattice to reach a configuration where all gate and boundary constraints are satisfied. The result of the computation is read from the output data encoded in the states of the bits of the devices at the boundaries of the lattice which are not already fixed by the input data.

Abstract: A virtual parallel computing system and method represents bits with matrices and computes over all input states in parallel through a sequence of matrix operations. The matrix operations relate to logic gate operators to carry out a function implementation that represents a problem to be solved. Initial matrices are prepared to encode the weights of all input states, which can be binary states. Intermediate results can be simplified to decrease computational complexity while maintaining useful approximation results. The final matrices can encode the answer(s) to the problem represented by the function implementation. The system and method are particularly useful in speeding up database searches and in counting solutions of satisfiability problems.

Abstract: A virtual parallel computing system and method represents bits with matrices and computes over all input states in parallel through a sequence of matrix operations. The matrix operations relate to logic gate operators to carry out a function implementation that represents a problem to be solved. Initial matrices are prepared to encode the weights of all input states, which can be binary states. Intermediate results can be simplified to decrease computational complexity while maintaining useful approximation results. The final matrices can encode the answer(s) to the problem represented by the function implementation. The system and method are particularly useful in speeding up database searches and in counting solutions of satisfiability problems.

Abstract: A quantum junction device having three or more wires connected to a loop surrounding a magnetic flux is used to act as a switch responsive to magnetic flux and therefore useable for mass storage devices or as a flux detector by sensing current direction, conductance tensor, in response to a magnetic field under test.

Abstract: A quantum junction device having three or more wires connected to a loop surrounding a magnetic flux is used to act as a switch responsive to magnetic flux and therefore useable for mass storage devices or as a flux detector by sensing current direction, conductance tensor, in response to a magnetic field under test.