Abstract: In some implementations, a method of dynamically maintaining a device's operation within a safe operating area (SOA) may include sensing instantaneous voltage and current of the device; determining, based on the sensed instantaneous voltage and current, a value that represents a power dissipated in the device; using the determined dissipated power and a model of thermal behavior of the device to model a junction temperature of the device; and controlling operation of the device based on the modeled junction temperature. A programmable SOA circuit including sensing, scaling, filtering, and controlling functions may be packaged on a single die or in a package with a power transistor.

Abstract: A package for one or more semiconductor die is described. A generally rectangular package includes two large terminals that occupy substantially the entire length of the package and provide low resistance connections. Additional connections may be provided preferably in a central portion of a short end of the package. BGA connections between the semiconductor die and the package substrate provide low impedance connections between the die and the package contacts. The package and connections facilitate current flow orthogonal to the longest package dimension maximizing conductor width and minimizing interconnection resistance.

Abstract: High-performance low-power isolated bootstrapped gate drive apparatus and methods are disclosed for driving high-side and floating transistors. The gate drivers use edge-triggered capacitive-coupled inputs. The gate drivers may include detection and delay circuitry to facilitate zero-voltage-switching of the high side or floating transistor and providing more robust rejection of false triggering. A capacitively coupled differential input edge triggered gate driver provides exceptional immunity to false triggering. The gate drivers may be used in transformer coupled drive circuits using transformers that need only support coupled pulses wide enough to be recognized as an edge by the input circuit.

Abstract: High-performance low-power isolated bootstrapped gate drive apparatus and methods are disclosed for driving high-side and floating transistors. The gate drivers use edge-triggered capacitive-coupled inputs. The gate drivers may include detection and delay circuitry to facilitate zero-voltage-switching of the high side or floating transistor and providing more robust rejection of false triggering. A capacitively coupled differential input edge triggered gate driver provides exceptional immunity to false triggering. The gate drivers may be used in transformer coupled drive circuits using transformers that need only support coupled pulses wide enough to be recognized as an edge by the input circuit.

Abstract: In one aspect the invention relates to a method of selecting a state from a plurality of states using a program pin. The method includes connecting the program pin to one of a first current source and a second current source, in response to a first voltage applied to the program pin, to thereby generate a second voltage at the program pin, and selecting a state from the plurality of states in response to the first and second voltages. In another embodiment, the method includes determining whether the first voltage exceeds a first reference voltage. In another embodiment, the method includes connecting the program pin to the first current source if the first voltage does not exceed the first reference voltage, and connecting the program pin to the second current source if the first voltage exceeds the first reference voltage.

Abstract: This invention synchronizes the control signals generated by the out-of-range detection circuits with a predefined event. In one aspect, the invention relates to a method of controlling a switching regulator to regulate an output voltage. The method includes receiving a first enable signal and a second enable signal, comparing a feedback voltage representative of the output voltage to a first reference voltage and generating a first limit signal in response thereto and generating, in response to the first enable signal, a close switch command if the first limit signal indicates that the feedback voltage is less than the first reference voltage. The method further includes comparing the feedback voltage to a second reference voltage and generating a second limit signal in response thereto and generating, in response to the second enable signal, an open switch command if the second limit signal indicates that the feedback voltage is greater than the second reference voltage.

Abstract: This invention synchronizes the control signals generated by the out-of-range detection circuits with a predefined event. In one aspect, the invention relates to a method of controlling a switching regulator to regulate an output voltage. The method includes receiving a first enable signal and a second enable signal, comparing a feedback voltage representative of the output voltage to a first reference voltage and generating a first limit signal in response thereto and generating, in response to the first enable signal, a close switch command if the first limit signal indicates that the feedback voltage is less than the first reference voltage. The method further includes comparing the feedback voltage to a second reference voltage and generating a second limit signal in response thereto and generating, in response to the second enable signal, an open switch command if the second limit signal indicates that the feedback voltage is greater than the second reference voltage.

Abstract: In one aspect the invention relates to a method of selecting a state from a plurality of states using a program pin. The method includes connecting the program pin to one of a first current source and a second current source, in response to a first voltage applied to the program pin, to thereby generate a second voltage at the program pin, and selecting a state from the plurality of states in response to the first and second voltages. In another embodiment, the method includes determining whether the first voltage exceeds a first reference voltage. In another embodiment, the method includes connecting the program pin to the first current source if the first voltage does not exceed the first reference voltage, and connecting the program pin to the second current source if the first voltage exceeds the first reference voltage.

Abstract: A foldback circuit which responds to a voltage differential between the input and output terminals of a voltage regulator in excess of a foldback threshold by lowering the current limit threshold of a current limit circuit. The foldback circuit includes a transistor with a base coupled to the input voltage and an emitter coupled to the output voltage. The collector when conducting provides a current that decreases the current limit threshold. Diodes in the path between the input and output voltages through the transistor may be used in establishing the foldback threshold.

Abstract: A voltage regulator with a current limit circuit for limiting pass current in a pass transistor below a current limit threshold and a foldback circuit for lowering the current limit threshold when the voltage differential between the input and output terminals of the voltage regulator exceeds a foldback threshold, where the current limit threshold has a negative temperature coefficient, the current limit circuit comprising two transistors coupled to a sense resistor such that the difference in emitter-to-base voltages of the transistors is equal to the voltage drop of the sense resistor, where the collectors of the two transistors provides first and second currents to first and second resistors, respectively, where the first current is responsive to a pass current flowing through the sense resistor and decreases when the pass current increases, where the second current is independent of the pass current, and the foldback circuit provides a third current to the second resistor when the voltage differential bet

Abstract: A thermal shut down circuit with built-in temperature hysteresis, comprising first and second transistors configured as a bistable trigger circuit. The two transistors switch either a first or second emitter current through a bias resistor, thereby establishing a voltage hysteresis. By applying a reference voltage to the base of the first transistor, temperature dependent state transitions occur. A buffer transistor coupled to the collector of the second transistor allows the thermal shut down circuit to turn ON or OFF an auxiliary circuit. Thermal communication between the auxiliary circuit and the base-emitter junction of the first transistor allows the thermal shut down circuit to shut down the auxiliary circuit when the temperature exceeds a shutdown temperature, and thermal hysteresis built into the thermal shut down circuit prevents undesirable ON-OFF oscillation of the auxiliary circuit.

Abstract: A circuit providing start-up capability and foldback protection to a voltage regulator. A start-up circuit provides a start-up signal to initiate current flow to a load and also provides a foldback signal to set a current limit threshold under an over-load or short-circuit condition. A signal generator circuit operating on the regulated output voltage of the voltage regulator provides a current limit signal and a start-up control signal. The start-up circuit provides the start-up signal in response to the start-up control signal. The current limit signal sets the current limit threshold under normal operating conditions after start-up.