Patents by Inventor Clifford D. Hall

Clifford D. Hall has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7792303
    Abstract: Delivering a Direct Proof private key to a device installed in a client computer system in the field may be accomplished in a secure manner without requiring significant non-volatile storage in the device. A unique pseudo-random value is generated and stored in the device at manufacturing time. The pseudo-random value is used to generate a symmetric key for encrypting a data structure holding a Direct Proof private key and a private key digest associated with the device. The resulting-encrypted data structure is stored on a removable storage medium (such as a CD), and distributed to the owner of the client computer system. When the device is initialized on the client computer system, the system checks if a localized encrypted data structure is present in the system. If not, the system obtains the associated encrypted data structure from the removable storage medium.
    Type: Grant
    Filed: July 14, 2004
    Date of Patent: September 7, 2010
    Assignee: Intel Corporation
    Inventors: Ernie F. Brickell, James A. Sutton, II, Clifford D. Hall, David W. Grawrock
  • Patent number: 7765544
    Abstract: A method, apparatus and system for improving security on a virtual machines host is described. A shared file system on the host may include annotations usable by a service module to access files across VMs and to enforce security policies. The service module may additionally enable a unified user interface to improve usability of the host.
    Type: Grant
    Filed: December 17, 2004
    Date of Patent: July 27, 2010
    Assignee: Intel Corporation
    Inventors: Ernie F. Brickell, Clifford D. Hall, Joseph F. Cihula, Richard A. Uhlig
  • Publication number: 20100174872
    Abstract: A method and apparatus for matching parent processor address translations to media processors' address translations and providing concurrent memory access to a plurality of media processors through separate translation table information. In particular, a page directory for a given media application is copied to a media processor's page directory when the media application allocates memory that is to be shared by a media application running on the parent processor and media processors.
    Type: Application
    Filed: January 6, 2009
    Publication date: July 8, 2010
    Inventors: Brent S. Baxter, Prashant Sethi, Clifford D. Hall, William H. Clifford
  • Publication number: 20100150351
    Abstract: Delivering a Direct Proof private key to a device installed in a client computer system in the field may be accomplished in a secure manner without requiring significant non-volatile storage in the device. A unique pseudo-random value is generated and stored in the device at manufacturing time. The pseudo-random value is used to generate a symmetric key for encrypting a data structure holding a Direct Proof private key and a private key digest associated with the device. The resulting encrypted data structure is stored on a protected on-liner server accessible by the client computer system. When the device is initialized on the client computer system, the system checks if a localized encrypted data structure is present in the system. If not, the system obtains the associated encrypted data structure from the protected on-line server using a secure protocol.
    Type: Application
    Filed: February 23, 2010
    Publication date: June 17, 2010
    Inventors: James A. Sutton, II, Ernie F. Brickell, Clifford D. Hall, David W. Grawrock
  • Patent number: 7697691
    Abstract: Delivering a Direct Proof private key to a device installed in a client computer system in the field may be accomplished in a secure manner without requiring significant non-volatile storage in the device. A unique pseudo-random value is generated and stored in the device at manufacturing time. The pseudo-random value is used to generate a symmetric key for encrypting a data structure holding a Direct Proof private key and a private key digest associated with the device. The resulting encrypted data structure is stored on a protected on-liner server accessible by the client computer system. When the device is initialized on the client computer system, the system checks if a localized encrypted data structure is present in the system. If not, the system obtains the associated encrypted data structure from the protected on-line server using a secure protocol.
    Type: Grant
    Filed: July 14, 2004
    Date of Patent: April 13, 2010
    Assignee: Intel Corporation
    Inventors: James A. Sutton, II, Ernie F. Brickell, Clifford D. Hall, David W. Grawrock
  • Patent number: 7693286
    Abstract: Delivering a Direct Proof private key in a signed group of keys to a device installed in a client computer system in the field may be accomplished in a secure manner without requiring significant non-volatile storage in the device. A unique pseudo-random value is generated and stored along with a group number in the device at manufacturing time. The pseudo-random value is used to generate a symmetric key for encrypting a data structure holding a Direct Proof private key and a private key digest associated with the device. The resulting encrypted data structure is stored in a signed group of keys (e.g., a signed group record) on a removable storage medium (such as a CD or DVD), and distributed to the owner of the client computer system. When the device is initialized on the client computer system, the system checks if a localized encrypted data structure is present in the system.
    Type: Grant
    Filed: July 14, 2004
    Date of Patent: April 6, 2010
    Assignee: Intel Corporation
    Inventors: James A. Sutton, II, Clifford D. Hall, Ernie F. Brickell, David W. Grawrock
  • Patent number: 7571329
    Abstract: Secure storage and retrieval of a unique value associated with a device to/from a memory of a processing system. In at least one embodiment, the device needs to be able to access the unique value across processing system resets, and the device does not have sufficient non-volatile storage to store the unique value itself. Instead, the unique value is stored in the processing system memory in such a way that the stored unique value does not create a unique identifier for the processing system or the device. A pseudo-randomly or randomly generated initialization vector may be used to vary an encrypted data structure used to store the unique value in the memory.
    Type: Grant
    Filed: July 14, 2004
    Date of Patent: August 4, 2009
    Assignee: Intel Corporation
    Inventors: Ernie F. Brickell, Alberto J. Martinez, David W. Grawrock, James A. Sutton, II, Clifford D. Hall
  • Patent number: 7490215
    Abstract: A method and apparatus for matching parent processor address translations to media processors' address translations and providing concurrent memory access to a plurality of media processors through separate translation table information. In particular, a page directory for a given media application is copied to a media processor's page directory when the media application allocates memory that is to be shared by a media application running on the parent processor and media processors.
    Type: Grant
    Filed: December 22, 2004
    Date of Patent: February 10, 2009
    Assignee: Intel Corporation
    Inventors: Brent S. Baxter, Prashant Sethi, Clifford D. Hall, William H. Clifford
  • Patent number: 7296267
    Abstract: System and method for binding virtual machines to hardware contexts. A method includes obtaining resource requirements for a plurality of virtual machines, and binding one or more of the plurality of virtual machines to one or more of a plurality of hardware contexts associated with a processor based upon the resource requirements. The resource requirements may be the bandwidth and latency of the virtual machines. The method may be implemented as software on a storage device on a computing device having a processor that supports multiple hardware contexts. The method is particularly beneficial for real-time virtual machines.
    Type: Grant
    Filed: July 12, 2002
    Date of Patent: November 13, 2007
    Assignee: Intel Corporation
    Inventors: Erik C. Cota-Robles, Randolph L. Campbell, Clifford D. Hall, Gilbert Neiger, Richard A. Uhlig
  • Patent number: 7231486
    Abstract: An enhanced general input/output communication architecture, protocol and related methods are presented.
    Type: Grant
    Filed: August 23, 2002
    Date of Patent: June 12, 2007
    Assignee: Intel Corporation
    Inventors: Jasmin Ajanovic, David Harriman, Randolph L. Campbell, Jose A. Vargas, Clifford D. Hall, Prashant Sethi, Steve Pawlowski
  • Patent number: 7139890
    Abstract: Methods and arrangements to interface memory are described. Many embodiments comprise comparing a transaction or access from a source to memory addresses associated with the source to determine whether an address associated with the transaction is accessible by the source. Some embodiments may comprise defining protected memory. Several embodiments may comprise defining protected memory by, for example, determining a configuration for memory. Such embodiments may comprise protecting a memory location or limiting access to memory addresses associated with a protected memory location. Some of these embodiments may comprise accessing registers to define protected memory and verifying accesses to a memory location according to the definition of protected memory. Further embodiments may comprise generating an association between a source of an access and a memory location and storing the association to facilitate access to the memory location by the source.
    Type: Grant
    Filed: April 30, 2002
    Date of Patent: November 21, 2006
    Assignee: Intel Corporation
    Inventors: Douglas R. Moran, Clifford D. Hall, Thomas A. Piazza, Richard W. Jensen
  • Patent number: 7024555
    Abstract: An apparatus and method for unilaterally loading a secure operating system within a multiprocessor environment are described. The method includes disregarding a received load secure region instruction when a currently active load secure region operation is detected. Otherwise, a memory protection element is directed, in response to the received load secure region instruction, to form a secure memory environment. Once directed, unauthorized read/write access to one or more protected memory regions are prohibited. Finally, a cryptographic hash value of the one or more protected memory regions is stored within a digest information repository as a secure software identification value. Once stored, outside agents may request access to a digitally signed software identification value in order to establish security verification of secure software within the secure memory environment.
    Type: Grant
    Filed: November 1, 2001
    Date of Patent: April 4, 2006
    Assignee: Intel Corporation
    Inventors: Michael A. Kozuch, James A. Sutton, II, David Grawrock, Gilbert Neiger, Richard A. Uhlig, Bradley G. Burgess, David I. Poisner, Clifford D. Hall, Andy Glew, Lawrence O. Smith, III, Robert George
  • Publication number: 20040128469
    Abstract: According to one embodiment, a computer system is disclosed. The computer system includes a processor, a chipset coupled to the processor and a memory coupled to the chipset. The chipset translates partitioned virtual machine memory addresses received from the processor to page level addresses.
    Type: Application
    Filed: December 27, 2002
    Publication date: July 1, 2004
    Inventors: Clifford D. Hall, Randolph L. Campbell
  • Publication number: 20040010788
    Abstract: System and method for binding virtual machines to hardware contexts. A method includes obtaining resource requirements for a plurality of virtual machines, and binding one or more of the plurality of virtual machines to one or more of a plurality of hardware contexts associated with a processor based upon the resource requirements. The resource requirements may be the bandwidth and latency of the virtual machines. The method may be implemented as software on a storage device on a computing device having a processor that supports multiple hardware contexts. The method is particularly beneficial for real-time virtual machines.
    Type: Application
    Filed: July 12, 2002
    Publication date: January 15, 2004
    Inventors: Erik C. Cota-Robles, Randolph L. Campbell, Clifford D. Hall, Gilbert Neiger, Richard A. Uhlig
  • Publication number: 20030229794
    Abstract: A system and method for permitting the execution of system management mode (SMM) code during secure operations in a microprocessor system is described. In one embodiment, the system management interrupt (SMI) may be first directed to a handler in a secured virtual machine monitor (SVMM). The SMI may then be re-directed to SMM code located in a virtual machine (VM) that is under the security control of the SVMM. This redirection may be accomplished by allowing the SVMM to read and write the system management (SM) base register in the processor.
    Type: Application
    Filed: June 7, 2002
    Publication date: December 11, 2003
    Inventors: James A. Sutton, David W. Grawrock, Richard A. Uhlig, David I. Poisner, Andrew F. Glew, Clifford D. Hall, Lawrence O. Smith, Gilbert Neiger, Michael A. Kozuch, Robert T. George, Bradley G. Burgess
  • Publication number: 20030204693
    Abstract: Methods and arrangements to interface memory are described. Many embodiments comprise comparing a transaction or access from a source to memory addresses associated with the source to determine whether an address associated with the transaction is accessible by the source. Some embodiments may comprise defining protected memory. Several embodiments may comprise defining protected memory by, for example, determining a configuration for memory. Such embodiments may comprise protecting a memory location or limiting access to memory addresses associated with a protected memory location. Some of these embodiments may comprise accessing registers to define protected memory and verifying accesses to a memory location according to the definition of protected memory. Further embodiments may comprise generating an association between a source of an access and a memory location and storing the association to facilitate access to the memory location by the source.
    Type: Application
    Filed: April 30, 2002
    Publication date: October 30, 2003
    Inventors: Douglas R. Moran, Clifford D. Hall, Thomas A. Piazza, Richard W. Jensen
  • Publication number: 20030115380
    Abstract: An enhanced general input/output communication architecture, protocol and related methods are presented.
    Type: Application
    Filed: August 23, 2002
    Publication date: June 19, 2003
    Inventors: Jasmin Ajanovic, David Harriman, Randolph L. Campbell, Jose A. Vargas, Clifford D. Hall, Prashant Sethi, Steve Pawlowski
  • Publication number: 20030084346
    Abstract: An apparatus and method for unilaterally loading a secure operating system within a multiprocessor environment are described. The method includes disregarding a received load secure region instruction when a currently active load secure region operation is detected. Otherwise, a memory protection element is directed, in response to the received load secure region instruction, to form a secure memory environment. Once directed, unauthorized read/write access to one or more protected memory regions are prohibited. Finally, a cryptographic hash value of the one or more protected memory regions is stored within a digest information repository as a secure software identification value. Once stored, outside agents may request access to a digitally signed software identification value in order to establish security verification of secure software within the secure memory environment.
    Type: Application
    Filed: November 1, 2001
    Publication date: May 1, 2003
    Inventors: Michael A. Kozuch, James A. Sutton, David Grawrock, Gilbert Neiger, Richard A. Uhlig, Bradley G. Burgess, David I. Poisner, Clifford D. Hall, Andy Glew, Lawrence O. Smith, Robert T. George