Abstract: A control for an inverter system having first and second inverters that produce inverter outputs wherein the inverter outputs are combined by an interphase transformer (IPT) to produce an AC output includes circuitry for detecting a magnitude of a harmonic component in the AC output waveform and circuitry for developing first and second PWM control waveforms for controlling the first and second inverters, respectively. The second PWM control waveform is phase delayed relative to the first PWM control waveform to in turn regulate the magnitude of the harmonic component and DC content across the IPT is controlled to prevent damage to the IPT.

Abstract: A position monitor is provided for use in conjunction with a stepper motor wherein two imputs are provided to the monitor from the stepper motor phase windings. A first signal is provided which indicates, by pulses, the rising and falling edges of in the magnitudes of both phase winding signals. A second signal is provided to indicate the direction of rotation of the stepper motor. The first and second signals are used as inputs to a plurality of counters which maintain a digital value representing the position of the stepper rotor. The digital value is converted to an analog value and amplified for use as a signal representing, by its magnitude, the precise position of the rotor of the stepper motor. The monitor therefore maintains a digital value and outputs a voltage signal which represent the position of a stepper motor rotor as it rotates through a plurality of clockwise and/or counter-clockwise revolutions.

Abstract: A system is disclosed for sequentially disconnecting multiple phases of a first power source (12) from an electrical load (14) requiring a minimum of interruption and connecting a second power source (28) to the electrical load. A first embodiment of the invention disconnects immediately the phase in which a trip condition requiring disconnection of the first source power is detected and disconnects phases of a first power source (12) in which a trip condition is not detected upon the detection of zero current flow in those phases. In a second embodiment of the invention, each of the phases of the first power source (12) is disconnected immediately from the electrical load (14) upon the detection of a trip condition in any one of the phases requiring disconnection of the first power source. In both embodiments of the invention, the phases of the second backup power source (28) are connected upon the detection of the occurrence of zero voltage points in the respective phases.

Abstract: A voltage fault detector (10) for producing a trip signal causing switching from a first AC voltage source (12) to a second AC voltage source (14) is disclosed. A plurality of comparators (18,20,22) monitor a signal which is proportional to the magnitude of the voltage of a first AC voltage source (12) to determine if sample values fall within predetermined ranges. A counter (30) counts the number of samples falling outside the predetermined range to generate the trip signal when the count reaches a predetermined limit. The counter (30) is augmented for each sample which is outside the predetermined range and decremented for each sample which is within the predetermined range.

Abstract: An overcurrent protection system (10) for a power supply is disclosed. The system monitors the instantaneous flow of current between a power supply (12) and an electrical load (16) to detect when the flow of current exceeds a maximum rated amount. A counter (30) is used for counting the number of times that samples of the flow of current exceed the maximum rated amount synchronous with zero current crossing to generate a trip signal when a predetermined count is reached which disconnects the power supply (12) from the load. The counter (30) is decremented each time a predetermined time interval elapses in which the flow of current above the maximum rate is not detected as measured from a point of zero current flow between the power supply (12) and the electrical load (14). The invention may be used for both AC and DC power supplies.

Abstract: A power supply system for processing current and voltage faults is disclosed. Each phase of a first power source (12) and each phase of a second power source (28) has a pair of switches (60, 64) for controlling the conduction of current from the phase of the power source to a phase load (29). In each of the phases of the first power source (12), a first switch (60) is controlled by a first control signal which has a high level when a voltage fault or current fault condition does not exist. When either a voltage fault or a current fault condition exists, the first switch (60) is turned off. The second switch (64) is turned on by a second control signal during a determination of whether a current fault exists. Furthermore, a logic network causes the first control signal to assume the second level in response to any one of an RMS over/under voltage fault, an instantaneous overcurrent fault, an I.sup.