Abstract: A PIN diode-based monolithic Nuclear Event Detector and method of manufacturing same for use in detecting a desired level of gamma radiation, in which a PIN diode is integrated with signal processing circuitry, for example CMOS circuitry, in a single thin-film Silicon On Insulator (SOI) chip. The PIN diode is implemented in either a p-, intrinsic, or n-substrate layer. The signal processing circuitry is located in a thin semiconductor layer and is in electrical communication with the PIN diode. The PIN diode may be integrated with the signal processing circuitry onto a single chip, or may be fabricated stand alone using SOI methods according to the method of the invention.

Abstract: A PIN diode-based monolithic Nuclear Event Detector and method of manufacturing same for use in detecting a desired level of gamma radiation, in which a PIN diode is integrated with signal processing circuitry, for example CMOS circuitry, in a single thin-film Silicon On Insulator (SOI) chip. The PIN diode is implemented in the p-substrate layer. The signal processing circuitry is located in a thin semiconductor layer and is in electrical communication with the PIN diode. The PIN diode may be integrated with the signal processing circuitry onto a single chip, or may be fabricated stand alone using SOI methods according to the method of the invention.

Abstract: A PIN diode-based monolithic Nuclear Event Detector and method of manufacturing same for use in detecting a desired level of gamma radiation, in which a PIN diode is integrated with signal processing circuitry, for example CMOS circuitry, in a single thin-film Silicon On Insulator (SOI) chip. The PIN diode is implemented in the p- substrate layer. The signal processing circuitry is located in a thin semiconductor layer and is in electrical communication with the PIN diode. The PIN diode may be integrated with the signal processing circuitry onto a single chip, or may be fabricated stand alone using SOI methods according to the method of the invention.

Abstract: Complementary semiconductor devices are fabricated in single crystal semiconductor segments within a monolithic substrate, using planar diffusion techniques. An impurity element of one conductivity-determining type is partially diffused into one of a pair of the single crystal segments having opposite conductivity types to one another. Thereafter, a second impurity element of the other conductivity-determining type and having a faster diffusion coefficient than the first element is diffused into the second of the pair of single crystal segments at a time and for a temperature sufficient to effect penetration of both impurities to substantially the same depth in their respective segments. The concentrations of the impurities are selected to provide common operational element regions of the complementary devices with substantially identical resistivities.