Patents by Inventor Cody J. Murray

Cody J. Murray has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240151594
    Abstract: Embodiments disclosed herein relate to measuring thermal properties. At least one embodiment includes a method including heating a location of an object with an excitation laser beam, the excitation laser beam being a continuous-wave laser beam modulated by a square-wave modulation waveform. The method may also include measuring temperature at the location over time by measuring changes in one or more reflective properties at the location. Related apparatuses are also disclosed.
    Type: Application
    Filed: October 18, 2023
    Publication date: May 9, 2024
    Inventors: Cody A. Dennett, Robert S. Schley, Yuzhou Wang, David H. Hurley, Geoffrey L. Beausoleil, Daniel J. Murray, Michael J. Moorehead
  • Patent number: 11947712
    Abstract: Embodiments are disclosed for a method. The method includes generating a correction datastore indicating shifts in magnitude representing corresponding characters that uniquely identify hardware comprising a computer processing chip. The method further includes generating security masks based on a correction file. Additionally, the method includes using a correction process for the computer processing chip. The generated security masks include corresponding overlays representing the shifts in magnitude with respect to corresponding product masks for the computer processing chip. The method also includes generating the computer processing chip using the security masks and the product masks.
    Type: Grant
    Filed: September 27, 2021
    Date of Patent: April 2, 2024
    Assignee: International Business Machines Corporation
    Inventors: Richard C. Johnson, Alex Richard Hubbard, Vinay Pai, Cody J. Murray, Fee Li Lie, Nikhil Jain
  • Publication number: 20240087939
    Abstract: Described is a semiconductor processing system including a measurement tool configured to measure warpage characteristics in a semiconductor wafer. The semiconductor processing system further includes a pixelated surface configured to retain the semiconductor wafer, where the pixelated surface approximates the warpage characteristics to conform to the semiconductor wafer. The semiconductor processing system further includes a semiconductor processing tool configured to perform processing on the semiconductor wafer while it is retained on the pixelated surface.
    Type: Application
    Filed: September 14, 2022
    Publication date: March 14, 2024
    Inventors: VINAY PAI, Nikhil Jain, Alex Richard Hubbard, Cody J. Murray, Richard C. Johnson
  • Patent number: 11688636
    Abstract: A method of manufacturing a semiconductor device is provided. The method includes forming a plurality of metal lines on substrate, forming a sacrificial dielectric material layer between the metal lines, forming a hardmask over at least one of the metal lines, etching at least one of the metal lines that is not covered by the hardmask, treating the sacrificial dielectric material layer to soften the layer. The method also includes removing the treated sacrificial dielectric material layer.
    Type: Grant
    Filed: June 18, 2021
    Date of Patent: June 27, 2023
    Assignee: International Business Machines Corporation
    Inventors: Somnath Ghosh, Karen Elizabeth Petrillo, Cody J. Murray, Ekmini Anuja De Silva, Chi-Chun Liu, Dominik Metzler, John Christopher Arnold
  • Publication number: 20230094707
    Abstract: Embodiments are disclosed for a method. The method includes generating a correction datastore indicating shifts in magnitude representing corresponding characters that uniquely identify hardware comprising a computer processing chip. The method further includes generating security masks based on a correction file. Additionally, the method includes using a correction process for the computer processing chip. The generated security masks include corresponding overlays representing the shifts in magnitude with respect to corresponding product masks for the computer processing chip. The method also includes generating the computer processing chip using the security masks and the product masks.
    Type: Application
    Filed: September 27, 2021
    Publication date: March 30, 2023
    Inventors: Richard C. Johnson, Alex Richard Hubbard, Vinay Pai, Cody J. Murray, Fee Li Lie, Nikhil Jain
  • Patent number: 11561481
    Abstract: Techniques for using open frame (E0) exposures for lithographic tool track/cluster monitoring are provided. In one aspect, a method for monitoring a lithographic process includes: performing open frame exposures E0 of at least one wafer coated with a photoresist using a photolithography tool; baking and developing the at least one wafer; performing a defect inspection of the at least one wafer to generate a haze map; grouping haze data from the haze map; and analyzing the haze data to identify a maximum E0 response dose E?.
    Type: Grant
    Filed: July 20, 2020
    Date of Patent: January 24, 2023
    Assignee: International Business Machines Corporation
    Inventors: Cody J. Murray, Ekmini Anuja De Silva, Christopher Frederick Robinson, Luciana Meli
  • Publication number: 20220415523
    Abstract: In an approach, a processor receives device identification information corresponding to at least one device local to a location of a transaction. A processor receives notification of an infected user. A processor determines that the infected user is associated with the transaction. A processor identifies a second user from the device identification information. A processor sends a notification to the second user.
    Type: Application
    Filed: June 24, 2021
    Publication date: December 29, 2022
    Inventors: Richard C. Johnson, Alex Richard Hubbard, Cody J. Murray, Vinay Pai, Nikhil Jain
  • Publication number: 20220406657
    Abstract: A method of manufacturing a semiconductor device is provided. The method includes forming a plurality of metal lines on substrate, forming a sacrificial dielectric material layer between the metal lines, forming a hardmask over at least one of the metal lines, etching at least one of the metal lines that is not covered by the hardmask, treating the sacrificial dielectric material layer to soften the layer. The method also includes removing the treated sacrificial dielectric material layer.
    Type: Application
    Filed: June 18, 2021
    Publication date: December 22, 2022
    Inventors: SOMNATH GHOSH, Karen Elizabeth Petrillo, Cody J. Murray, Ekmini Anuja De Silva, Chi-Chun LIU, Dominik METZLER, John Christopher Arnold
  • Publication number: 20220019139
    Abstract: Techniques for using open frame (E0) exposures for lithographic tool track/cluster monitoring are provided. In one aspect, a method for monitoring a lithographic process includes: performing open frame exposures E0 of at least one wafer coated with a photoresist using a photolithography tool; baking and developing the at least one wafer; performing a defect inspection of the at least one wafer to generate a haze map; grouping haze data from the haze map; and analyzing the haze data to identify a maximum E0 response dose E?.
    Type: Application
    Filed: July 20, 2020
    Publication date: January 20, 2022
    Inventors: Cody J. Murray, Ekmini Anuja De Silva, Christopher Frederick Robinson, Luciana Meli