Patents by Inventor Colin B. Verrilli

Colin B. Verrilli has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120218885
    Abstract: According to embodiments of the invention, there is provided a method for operating a network processor. The network processor receiving a first data packet in a stream of data packets and a set of receive-queues adapted to store receive data packets. The network processor processing the first data packet by reading a flow identification in the first data packet; determining a quality of service for the first data packet; mapping the flow identification and the quality of service into an index for selecting a first receive-queue for routing the first data packet; and utilizing the index to route the first data packet to the first receive-queue.
    Type: Application
    Filed: May 8, 2012
    Publication date: August 30, 2012
    Applicant: International Business Machines Corporation
    Inventors: Francois Abel, Claude Basso, Jean L. Calvignac, Natarajan Vaidhyanathan, Fabrice Verplanken, Colin B. Verrilli
  • Publication number: 20120204002
    Abstract: A mechanism is provided for sharing a communication used by a parser (parser path) in a network adapter of a network processor for sending requests for a process to be executed by an external coprocessor. The parser path is shared by processors of the network processor (software path) to send requests to the external processor. The mechanism uses for the software path a request mailbox comprising a control address and a data field accessed by MMIO for sending two types of messages, one message type to read or write resources and one message type to trigger an external process in the coprocessor and a response mailbox for receiving response from the external coprocessor comprising a data field and a flag field. The other processors of the network poll the flag until set and get the coprocessor result in the data field.
    Type: Application
    Filed: February 3, 2012
    Publication date: August 9, 2012
    Applicant: Internaitonal Business Machines Corporation
    Inventors: Claude Basso, Jean L. Calvignac, Chih-jen Chang, Philippe Damon, Natarajan Vaidhyanathan, Fabrice J. Verplanken, Colin B. Verrilli
  • Publication number: 20120204190
    Abstract: A mechanism is provided for merging in a network processor results from a parser and results from an external coprocessor providing processing support requested by said parser. The mechanism enqueues in a result queue both parser results needing to be merged with a coprocessor result and parser results which have no need to be merged with a coprocessor result. An additional queue is used to enqueue the addresses of the result queue where the parser results are stored. The result from the coprocessor is received in a simple response register. The coprocessor result is read by the result queue management logic from the response register and merged to the corresponding incomplete parser result read in the result queue at the address enqueued in the additional queue.
    Type: Application
    Filed: February 3, 2012
    Publication date: August 9, 2012
    Applicant: International Business Machines Corporation
    Inventors: Claude Basso, Jean L. Calvignac, Chih-jen Chang, Philippe Damon, Natarajan Vaidhyanathan, Fabrice J. Verplanken, Colin B. Verrilli
  • Publication number: 20120192190
    Abstract: A host Ethernet adapter (HEA) and method of managing network communications is provided. The HEA includes a host interface configured for communication with a multi-core processor over a processor bus. The host interface comprises a receive processing element including a receive processor, a receive buffer and a scheduler for dispatching packets from the receive buffer to the receive processor; a send processing element including a send processor and a send buffer; and a completion queue scheduler (CQS) for dispatching completion queue elements (CQE) from the head of the completion queue (CQ) to threads of the multi-core processor in a network node mode.
    Type: Application
    Filed: January 21, 2011
    Publication date: July 26, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Claude Basso, Jean L. Calvignac, Chih-jen Chang, Philippe Damon, Natarajan Vaidhyanathan, Fabrice J. Verplanken, Colin B. Verrilli
  • Publication number: 20120155267
    Abstract: According to embodiments of the invention, there is provided a method, a system, and a computer program product for operating a network processor. The network processor processing a received data packet by reading a flow identification in the data packet; determining a quality of service criteria (QoSC) for the data packet; mapping the flow identification and the QoSC into an index for selecting a receive-queue for routing the data packet; and utilizing the index to route the data packet to the receive-queue.
    Type: Application
    Filed: November 22, 2011
    Publication date: June 21, 2012
    Applicant: International Business Machines Corporation
    Inventors: Francois Abel, Claude Basso, Jean L. Calvignac, Natarajan Vaidhyanathan, Fabrice Verplanken, Colin B. Verrilli
  • Publication number: 20110261687
    Abstract: Systems and methods to communicate data frames are provided. A particular apparatus may include a first adapter having a first queue configured to store a data frame associated with a first priority. The adapter is configured to generate a first priority pause frame. A distributed virtual bridge may be coupled to the first adapter. The distributed virtual bridge may include an integrated switch router and a first transport layer module configured to provide a frame-based interface to the integrated switch router. The transport layer module may include a first buffer associated with the first priority. A first bridge element of the distributed virtual bridge may be coupled to the first adapter queue and to the first transport layer module. The first bridge element is configured to receive the first priority pause frame from the adapter and to communicate an interrupt signal to the first transport layer module to interrupt delivery of the data frame to the first queue.
    Type: Application
    Filed: April 26, 2010
    Publication date: October 27, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: William J. Armstrong, Claude Basso, Colin B. Verrilli
  • Publication number: 20110264610
    Abstract: Systems and methods to forward data frames are provided. A particular apparatus may include a plurality of server computers and a distributed virtual bridge. The distributed virtual bridge may include a plurality of bridge elements coupled to the plurality of server computers and configured to forward a data frame between the plurality of server computers. The plurality of bridge elements may further be configured to automatically learn address data associated with the data frame. A controlling bridge may be coupled to the plurality of bridge elements. The controlling bridge may include a global forwarding table that is automatically updated to include the address data and is accessible to the plurality of bridge elements.
    Type: Application
    Filed: April 26, 2010
    Publication date: October 27, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: William J. Armstrong, Claude Basso, Josep Cors, David R. Engebretsen, Kyle A. Lucke, David A. Shedivy, Colin B. Verrilli, Bruce M. Walk
  • Publication number: 20110243134
    Abstract: Systems and methods to forward data frames are provided. A particular method may include receiving a data frame at a distributed virtual bridge. The distributed virtual bridge includes a first bridge element coupled to a first server computer and a second bridge element coupled to the first bridge element and to a second server computer. The distributed virtual bridge further includes a controlling bridge coupled to the first bridge element and to the second bridge element. The controlling bridge includes a global forwarding table. The data frame is forwarded from the first bridge element to the second bridge element of the distributed virtual bridge using address data associated with the data frame. A logical network associated with the frame may additionally be used to forward the data frame.
    Type: Application
    Filed: March 31, 2010
    Publication date: October 6, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: William J. Armstrong, Claude Basso, David R. Engebretsen, Kyle A. Lucke, Jeffrey J. Lynch, David A. Shedivy, Colin B. Verrilli, Bruce M. Walk
  • Patent number: 8005989
    Abstract: The classification system of a network device includes a cache in which a mapping between predefined characteristics of TCP/IP packets and associated actions are stored in response to the first “Frequent Flyer” packet in of a session. Selected characteristics from subsequent received packets of that session are correlated with the predefined characteristics and the stored actions are applied to the received packets if the selected characteristics and the predefined characteristics match, thus reducing the processing required for subsequent packets. The packets selected for caching may be data packets. For mismatched characteristics, the full packet search of the classification system is used to determine the action to apply to the received packet.
    Type: Grant
    Filed: August 8, 2008
    Date of Patent: August 23, 2011
    Assignee: International Business Machines Corporation
    Inventors: Everett A. Corl, Jr., Gordon T. Davis, Clark D. Jeffries, Natarajan Vaidhyanathan, Colin B. Verrilli
  • Publication number: 20110158249
    Abstract: An assignment constraint matrix method and apparatus used in assigning work, such as data packets, from a plurality of sources, such as data queues in a network processing device, to a plurality of sinks, such as processor threads in the network processing device. The assignment constraint matrix is implemented as a plurality of qualifier matrixes adapted to operate simultaneously in parallel. Each of the plurality of qualifier matrixes is adapted to determine sources in a subset of supported sources that are qualified to provide work to a set of sinks based on assignment constraints. The determination of qualified sources may be based sink availability information that may be provided for a set of sinks on a single chip or distributed on multiple chips.
    Type: Application
    Filed: December 30, 2009
    Publication date: June 30, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Claude Basso, Jean L. Calvignac, Chih-Jen Chang, Hubertus Franke, Fabrice J. Verplanken, Colin B. Verrilli
  • Patent number: 7961729
    Abstract: A method, computer program product, and system for managing broadcast packets or multicast packets received by an Ethernet adapter comprising a plurality of logical ports are provided. The method, computer program product, and system provide for a first function operable to register a logical port of the Ethernet adapter as a recipient of any broadcast packet received by the Ethernet adapter satisfying a first predefined criterion and a second function operable to register the logical port of the Ethernet adapter as a recipient of any multicast packet received by the Ethernet adapter satisfying a second predefined criterion, wherein the Ethernet adapter is shared by a plurality of applications executing on a plurality of virtual systems, the first function and the second function being invocable by an application assigned to the logical port.
    Type: Grant
    Filed: January 8, 2007
    Date of Patent: June 14, 2011
    Assignee: International Business Machines Corporation
    Inventors: Charles W. Gainey, Jr., Colin B. Verrilli
  • Patent number: 7940785
    Abstract: A method, computer program product, and system for managing packets received by an Ethernet adapter shared by a plurality of threads are provided. The method, computer program product, and system provide for a first function operable to add a connection to a connection table of the Ethernet adapter and associate the connection with a queue pair and a second function operable to remove the connection from the connection table of the Ethernet adapter, wherein the Ethernet adapter is operable to route any packet corresponding to the connection received by the Ethernet adapter to the queue pair associated with the connection responsive to the connection being in the connection table.
    Type: Grant
    Filed: January 8, 2007
    Date of Patent: May 10, 2011
    Assignee: International Business Machines Corporation
    Inventors: Charles W. Gainey, Jr., Colin B. Verrilli
  • Publication number: 20100217905
    Abstract: A synchronization optimized queuing method and device to minimize software/hardware interaction in network interface hardware during an end-of-initiative process, including network adapter queue implementations for network interface hardware for optimized communication in a computer system. An end-of-initiative procedure to ensure that the network interface hardware has received an interrupt enable and to recheck the interrupt queue is unnecessary in the present invention.
    Type: Application
    Filed: February 24, 2009
    Publication date: August 26, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Lakshminarayana Arimilli, Claude Basso, Piyush Chaudhary, Benard C. Drerup, Jody B. Joyner, Jan-Bernd Themann, Christoph Raisch, Colin B. Verrilli
  • Patent number: 7782888
    Abstract: A system and method in accordance with the present invention allows for an adapter to be utilized in a server environment that can accommodate both a 10 G and a 1 G source utilizing the same pins. This is accomplished through the use of a high speed serializer/deserializer (high speed serdes) which can accommodate both data sources. The high speed serdes allows for the use of a relatively low reference clock speed on the NIC to provide the proper clocking of the data sources and also allows for different modes to be set to accommodate the different data sources. Finally the system allows for the adapter to use the same pins for multiple data sources.
    Type: Grant
    Filed: December 10, 2007
    Date of Patent: August 24, 2010
    Assignee: International Business Machines Corporation
    Inventors: Claude Basso, Jean Louis Calvignac, Chih-jen Chang, Philippe Damon, Natarajan Vaidhyanathan, Fabrice Jean Verplanken, Colin B. Verrilli
  • Patent number: 7715428
    Abstract: Mechanisms for processing of communications between data processing devices are provided. With the mechanisms of the illustrative embodiments, a set of techniques that enables sustaining media speed by distributing transmit and receive-side processing over multiple processing cores is provided. In addition, these techniques also enable designing multi-threaded network interface controller (NIC) hardware that efficiently hides the latency of direct memory access (DMA) operations associated with data packet transfers over an input/output (I/O) bus. Multiple processing cores may operate concurrently using separate instances of a communication protocol stack and device drivers to process data packets for transmission with separate hardware implemented send queue managers in a network adapter processing these data packets for transmission.
    Type: Grant
    Filed: January 31, 2007
    Date of Patent: May 11, 2010
    Assignee: International Business Machines Corporation
    Inventors: Claude Basso, Jean L. Calvignac, Chih-jen Chang, Philippe Damon, Herman D. Dierks, Jr., Christoph Raisch, Jan-Bernd Themann, Natarajan Vaidhyanathan, Fabrice J. Verplanken, Colin B. Verrilli
  • Patent number: 7464181
    Abstract: The classification system of a network device includes a cache in which a mapping between predefined characteristics of TCP/IP packets and associated actions are stored in response to the first “Frequent Flyer” packet in of a session. Selected characteristics from subsequent received packets of that session are correlated with the predefined characteristics and the stored actions are applied to the received packets if the selected characteristics and the predefined characteristics match, thus reducing the processing required for subsequent packets. The packets selected for caching may be data packets. For mismatched characteristics, the full packet search of the classification system is used to determine the action to apply to the received packet.
    Type: Grant
    Filed: September 11, 2003
    Date of Patent: December 9, 2008
    Assignee: International Business Machines Corporation
    Inventors: Everett A. Corl, Jr., Gordon T. Davis, Clark D. Jeffries, Natarajan Vaidhyanathan, Colin B. Verrilli
  • Publication number: 20080298244
    Abstract: The classification system of a network device includes a cache in which a mapping between predefined characteristics of TCP/IP packets and associated actions are stored in response to the first “Frequent Flyer” packet in of a session. Selected characteristics from subsequent received packets of that session are correlated with the predefined characteristics and the stored actions are applied to the received packets if the selected characteristics and the predefined characteristics match, thus reducing the processing required for subsequent packets. The packets selected for caching may be data packets. For mismatched characteristics, the full packet search of the classification system is used to determine the action to apply to the received packet.
    Type: Application
    Filed: August 8, 2008
    Publication date: December 4, 2008
    Applicant: International Business Machines Corporation
    Inventors: Everett A. Corl, JR., Gordon T. Davis, Clark D. Jeffries, Natarajan Vaidhyanathan, Colin B. Verrilli
  • Publication number: 20080181245
    Abstract: A system and method for multicore processing of communications between data processing devices are provided. With the mechanisms of the illustrative embodiments, a set of techniques that enables sustaining media speed by distributing transmit and receive-side processing over multiple processing cores is provided. In addition, these techniques also enable designing multi-threaded network interface controller (NIC) hardware that efficiently hides the latency of direct memory access (DMA) operations associated with data packet transfers over an input/output (I/O) bus. Multiple processing cores may operate concurrently using separate instances of a communication protocol stack and device drivers to process data packets for transmission with separate hardware implemented send queue managers in a network adapter processing these data packets for transmission.
    Type: Application
    Filed: January 31, 2007
    Publication date: July 31, 2008
    Inventors: Claude Basso, Jean L. Calvignac, Chih-jen Chang, Philippe Damon, Herman D. Dierks, Christoph Raisch, Jan-Bernd Themann, Natarajan Vaidhyanathan, Fabrice J. Verplanken, Colin B. Verrilli
  • Publication number: 20080165771
    Abstract: A method, computer program product, and system for managing broadcast packets or multicast packets received by an Ethernet adapter comprising a plurality of logical ports are provided. The method, computer program product, and system provide for a first function operable to register a logical port of the Ethernet adapter as a recipient of any broadcast packet received by the Ethernet adapter satisfying a first predefined criterion and a second function operable to register the logical port of the Ethernet adapter as a recipient of any multicast packet received by the Ethernet adapter satisfying a second predefined criterion, wherein the Ethernet adapter is shared by a plurality of applications executing on a plurality of virtual systems, the first function and the second function being invocable by an application assigned to the logical port.
    Type: Application
    Filed: January 8, 2007
    Publication date: July 10, 2008
    Applicant: International Business Machines Corporation
    Inventors: Charles W. GAINEY, Colin B. Verrilli
  • Publication number: 20080165777
    Abstract: A method, computer program product, and system for managing packets received by an Ethernet adapter shared by a plurality of threads are provided. The method, computer program product, and system provide for a first function operable to add a connection to a connection table of the Ethernet adapter and associate the connection with a queue pair and a second function operable to remove the connection from the connection table of the Ethernet adapter, wherein the Ethernet adapter is operable to route any packet corresponding to the connection received by the Ethernet adapter to the queue pair associated with the connection responsive to the connection being in the connection table.
    Type: Application
    Filed: January 8, 2007
    Publication date: July 10, 2008
    Applicant: International Business Machines Corporation
    Inventors: Charles W. GAINEY, Colin B. Verrilli