Patents by Inventor Colin Johnstone
Colin Johnstone has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10673662Abstract: A method for generating M parallel pseudorandom binary sequences (PRBSs), each comprising a 2n?1 sequence of pseudorandom bits, includes loading into the circuit an initial M-bit word, the initial M-bit word comprising M sequential bits selected from a pre-determined PRBS-n sequence, wherein n>1 and M>n. The method includes generating, using a plurality of logic gates of the circuit, a next M-bit word using at least n+1 of the M sequential bits of the initial M-bit word. The method includes repeatedly generating, using the logic gates of the circuit, the next M-bit word from a previous M-bit word using the at least n+1 of M sequential bits of the previous M-bit word, resulting in M parallel sequences of the PRBS-n sequence. The method includes transmitting the generated next M-bit words on an M-bit wide parallel bus.Type: GrantFiled: May 11, 2018Date of Patent: June 2, 2020Assignee: KEYSIGHT TECHNOLOGIES, INC.Inventor: Colin Johnstone
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Publication number: 20190349225Abstract: A method for generating M parallel pseudorandom binary sequences (PRBSs), each comprising a 2n?1 sequence of pseudorandom bits, includes loading into the circuit an initial M-bit word, the initial M-bit word comprising M sequential bits selected from a pre-determined PRBS-n sequence, wherein n>1 and M>n. The method includes generating, using a plurality of logic gates of the circuit, a next M-bit word using at least n+1 of the M sequential bits of the initial M-bit word. The method includes repeatedly generating, using the logic gates of the circuit, the next M-bit word from a previous M-bit word using the at least n+1 of M sequential bits of the previous M-bit word, resulting in M parallel sequences of the PRBS-n sequence. The method includes transmitting the generated next M-bit words on an M-bit wide parallel bus.Type: ApplicationFiled: May 11, 2018Publication date: November 14, 2019Inventor: Colin Johnstone
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Patent number: 9449773Abstract: An actuator that includes a shelf having a pivot cone, a first member, a second member, a trigger pin and a trigger lever latch. The first member includes a weight, a first shaft extending upwardly from the weight and through an opening in the pivot cone, and a first plate affixed to the first shaft. The first plate is supported by the pivot cone. The second member includes a second plate resting on the first plate and a second shaft extending upwardly from the second plate. The trigger lever latch includes a first portion connected to the second shaft and a second portion extending upwardly at an angle away from the first portion. The trigger pin has an engagement surface. The trigger pin is movable between an operational state and a tripped state. The second end of the trigger lever latch is engaged with the engagement surface.Type: GrantFiled: June 26, 2014Date of Patent: September 20, 2016Inventor: Colin Johnstone
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Publication number: 20140318935Abstract: An actuator that includes a shelf having a pivot cone, a first member, a second member, a trigger pin and a trigger lever latch. The first member includes a weight, a first shaft extending upwardly from the weight and through an opening in the pivot cone, and a first plate affixed to the first shaft. The first plate is supported by the pivot cone. The second member includes a second plate resting on the first plate and a second shaft extending upwardly from the second plate. The trigger lever latch includes a first portion connected to the second shaft and a second portion extending upwardly at an angle away from the first portion. The trigger pin has an engagement surface. The trigger pin is movable between an operational state and a tripped state. The second end of the trigger lever latch is engaged with the engagement surface.Type: ApplicationFiled: June 26, 2014Publication date: October 30, 2014Inventor: Colin Johnstone
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Patent number: 8766118Abstract: An actuator that includes a shelf having a pivot cone, a first member, a second member, a trigger pin and a trigger lever latch. The first member includes a weight, a first shaft extending upwardly from the weight and through an opening in the pivot cone, and a first plate affixed to the first shaft. The first plate is supported by the pivot cone. The second member includes a second plate resting on the first plate and a second shaft extending upwardly from the second plate. The trigger lever latch includes a first portion connected to the second shaft and a second portion extending upwardly at an angle away from the first portion. The trigger pin has an engagement surface. The trigger pin is movable between an operational state and a tripped state. The second end of the trigger lever latch is engaged with the engagement surface.Type: GrantFiled: November 16, 2011Date of Patent: July 1, 2014Inventor: Colin Johnstone
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Publication number: 20120118712Abstract: An actuator that includes a shelf having a pivot cone, a first member, a second member, a trigger pin and a trigger lever latch. The first member includes a weight, a first shaft extending upwardly from the weight and through an opening in the pivot cone, and a first plate affixed to the first shaft. The first plate is supported by the pivot cone. The second member includes a second plate resting on the first plate and a second shaft extending upwardly from the second plate. The trigger lever latch includes a first portion connected to the second shaft and a second portion extending upwardly at an angle away from the first portion. The trigger pin has an engagement surface. The trigger pin is movable between an operational state and a tripped state. The second end of the trigger lever latch is engaged with the engagement surface.Type: ApplicationFiled: November 16, 2011Publication date: May 17, 2012Inventor: Colin Johnstone
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Patent number: 7817762Abstract: An apparatus and method for detecting leading pulse edges of a signal includes a controller, hysteresis threshold comparators and qualification timers. The controller uses the outputs from the timers in order to determine whether or not a transition of the input signal constitutes a leading pulse edge of the input signal.Type: GrantFiled: December 12, 2005Date of Patent: October 19, 2010Assignee: Agilent Technologies, Inc.Inventors: Colin Johnstone, Eric Breakenridge
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Patent number: 7366049Abstract: A dual port memory is updated at substantially the same data sampling rate as a clock frequency of the dual port memory. The dual port memory stores data relating to each different parameter value in a stream of data samples, and provides the stored data from an address in the memory corresponding to the received parameter value. An updating element updates stored data and provides the updated data to an input of the dual port memory for writing back into the address corresponding to the received parameter value. A first port of the dual port memory is utilised as the output of the dual port memory coupled to the input of the updating element on a first clock cycle of the dual port memory, and a second port of the dual port memory is normally utilised as the input of the dual port memory coupled to the output of the updating element on a second clock cycle, the next address being accessed via the first port on the second clock cycle.Type: GrantFiled: May 4, 2006Date of Patent: April 29, 2008Assignee: Agilent Technologies, Inc.Inventor: Colin Johnstone
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Patent number: 7277820Abstract: In apparatus for generating a Complementary Cumulative Distribution Function (CCDF) curve for an input signal, an analog to digital converter (ADC) samples the input signal at sampling points to provide a parameter value corresponding to a desired parameter of the input signal at each sampled point. A memory element provides a frequency count of occurrence of each received parameter value from an address in the memory corresponding to the received parameter value. An adder receives the frequency count, increments the count and provides the incremented count to an input of the memory element for writing back into the address corresponding to the received parameter value. A CCDF curve generating module reads the frequency count stored in the memory element corresponding to each parameter value and generates a CCDF curve therefrom.Type: GrantFiled: May 4, 2006Date of Patent: October 2, 2007Assignee: Agilent Technologies, Inc.Inventors: Colin Johnstone, Eric Breakenridge
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Patent number: 7265700Abstract: Digital samples corresponding to a pulsed input signal are provided from an ADC to a memory for storage and to a pulse extraction circuit. The pulse extraction circuit detects the leading and trailing edges of pulses in the input signal. The digital samples are stored in both a Current memory buffer and a Next memory buffer. When a pulse trailing edge is detected, the Current buffer is stopped from storing further samples, the Next buffer becomes the Current buffer and a new buffer becomes the Next buffer. Digital data samples are then provided from the (previous) Current buffer after it has stopped storing samples.Type: GrantFiled: June 27, 2006Date of Patent: September 4, 2007Assignee: Agilent Technologies Inc.Inventors: Colin Johnstone, Eric Breakenridge
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Publication number: 20070001887Abstract: Digital samples corresponding to a pulsed input signal are provided from an ADC to a memory for storage and to a pulse extraction circuit. The pulse extraction circuit detects the leading and trailing edges of pulses in the input signal. The digital samples are stored in both a Current memory buffer and a Next memory buffer. When a pulse trailing edge is detected, the Current buffer is stopped from storing further samples, the Next buffer becomes the Current buffer and a new buffer becomes the Next buffer. Digital data samples are then provided from the (previous) Current buffer after it has stopped storing samples.Type: ApplicationFiled: June 27, 2006Publication date: January 4, 2007Inventors: Colin Johnstone, Eric Breakenridge
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Publication number: 20060259257Abstract: In apparatus for generating a Complementary Cumulative Distribution Function (CCDF) curve for an input signal, an analog to digital converter (ADC) samples the input signal at sampling points to provide a parameter value corresponding to a desired parameter of the input signal at each sampled point. A memory element provides a frequency count of occurrence of each received parameter value from an address in the memory corresponding to the received parameter value. An adder receives the frequency count, increments the count and provides the incremented count to an input of the memory element for writing back into the address corresponding to the received parameter value. A CCDF curve generating module reads the frequency count stored in the memory element corresponding to each parameter value and generates a CCDF curve therefrom.Type: ApplicationFiled: May 4, 2006Publication date: November 16, 2006Inventors: Colin Johnstone, Eric Breakenridge
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Publication number: 20060256641Abstract: A dual port memory is updated at substantially the same data sampling rate as a clock frequency of the dual port memory. The dual port memory stores data relating to each different parameter value in a stream of data samples, and provides the stored data from an address in the memory corresponding to the received parameter value. An updating element updates stored data and provides the updated data to an input of the dual port memory for writing back into the address corresponding to the received parameter value. A first port of the dual port memory is utilised as the output of the dual port memory coupled to the input of the updating element on a first clock cycle of the dual port memory, and a second port of the dual port memory is normally utilised as the input of the dual port memory coupled to the output of the updating element on a second clock cycle, the next address being accessed via the first port on the second clock cycle.Type: ApplicationFiled: May 5, 2006Publication date: November 16, 2006Inventor: Colin Johnstone
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Publication number: 20060199497Abstract: A conditioned vestibule for a cold storage doorway is provided having a trackless, bi-folding door operated by an actuator that rotates a first arm portion. The first arm portion rotates about a first end. A second arm portion is connected pivotally to a second end of the first arm portion at a hinge. The second arm portion rotates relative to the first arm portion at the hinge, in response to movement of the actuator. A door body is connected to at least one of the first and second arm portions. In one embodiment, the vestibule further includes an air curtain, including a fan that circulates air across a doorway opening across into which the first and second arm portions extend, a discharge means that discharges the air across the opening, and a return means that communicates discharged air to the fan.Type: ApplicationFiled: October 28, 2005Publication date: September 7, 2006Inventors: Peter Smith, Curtis Berry, Colin Johnstone, Paul Ashley
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Publication number: 20060176082Abstract: An apparatus and method for detecting leading pulse edges of a signal includes a controller, hysteresis threshold comparators and qualification timers. The controller uses the outputs from the timers in order to determine whether or not a transition of the input signal constitutes a leading pulse edge of the input signal.Type: ApplicationFiled: December 12, 2005Publication date: August 10, 2006Inventors: Colin Johnstone, Eric Breakenridge
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Patent number: 6864689Abstract: Attenuation of a pulsed signal traversing a cable is assessed by identifying a pulse in a signal received after traversing the cable and determining first and second reference signal levels in dependence upon characteristics of the pulse. A measurement is made of the slope of the pulse between the first and second reference signal levels (such as 25% and 75% of the peak pulse magnitude), and this measurement is used to determine an indication of the cable attenuation. The cable attenuation may in turn be used to determine a threshold for indicating loss of signal during a measurement operation.Type: GrantFiled: January 9, 2003Date of Patent: March 8, 2005Assignee: Agilent Technologies, Inc.Inventors: Alexander Stephen, Daya Rasaratnam, Colin Johnstone
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Patent number: 6831453Abstract: The magnitude of a pulse in a signal having both positive and negative polarity pulses (for example, a ternary PDH signal) is determined by measuring the magnitude of multiple samples of the signal. A reference level for the signal is determined from a plurality of these sample magnitudes, and the magnitude of a pulse in the signal is determined from the sample magnitudes and the reference level.Type: GrantFiled: November 13, 2002Date of Patent: December 14, 2004Assignee: Agilent Technologies, Inc.Inventors: Colin Johnstone, Alexander John Stephen
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Publication number: 20040208129Abstract: For testing communication in a network which carries data frames between communications ports having respective addresses, each frame containing an indication of the address of the source of the frame, the address of the intended destination of the frame, and other data, a tester has at least one communications port and a receiver for receiving a data frame arriving at the communications port. The tester includes circuitry for recognising test data frames according to at least one predetermined criterion, and extracting predetermined items from each test data frame including the source and destination addresses. A new test data frame is generated incorporating the predetermined items, with the source and destination addresses exchanged, and incorporating additional content of predetermined value, and a transmitter transmits the new data frame with the exchanged addresses into the network.Type: ApplicationFiled: January 21, 2004Publication date: October 21, 2004Applicant: Agilent Technologies, Inc.Inventors: Gordon Old, Colin Johnstone
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Patent number: 6765874Abstract: A data analyzer system measures the duration of a service disruption event in an asynchronous transfer mode (ATM) data transmission channel carrying an ATM stream of identifiable data cells in a defined order. The data analyzer system determines whether or not any of the data cells have been corrupted in transmission through the data transmission channel during transmission disruption. A timer determines a service disruption event duration upon elapse of a predetermined guard time.Type: GrantFiled: November 13, 2000Date of Patent: July 20, 2004Assignee: Agilent Technologies, Inc.Inventors: Norman Carder, Colin Johnstone
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Publication number: 20030137311Abstract: Attenuation of a pulsed signal traversing a cable is assessed by identifying a pulse in a signal received after traversing the cable and determining first and second reference signal levels in dependence upon characteristics of the pulse. A measurement is made of the slope of the pulse between the first and second reference signal levels (such as 25% and 75% of the peak pulse magnitude), and this measurement is used to determine an indication of the cable attenuation. The cable attenuation may in turn be used to determine a threshold for indicating loss of signal during a measurement operation.Type: ApplicationFiled: January 9, 2003Publication date: July 24, 2003Inventors: Alexander Stephen, Daya Rasaratnam, Colin Johnstone