Patents by Inventor Connie Tangpuz

Connie Tangpuz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method to manufacture a universal footprint for a package with exposed chip
    Patent number: 7256479
    Abstract: A semiconductor die package is disclosed. It may include a semiconductor die having a first surface and a second surface, and a leadframe structure. A molding material may be formed around at least a portion of the die and at least a portion of the leadframe structure. A solderable layer may be on the exterior surface of the molding material and the first surface of the semiconductor die.
    Type: Grant
    Filed: January 13, 2005
    Date of Patent: August 14, 2007
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Jonathan A. Noquil, Connie Tangpuz, Romel Manatad, Stephen Martin, Rajeev Joshi, Venkat Iyer
  • Flip chip substrate design
    Patent number: 7101734
    Abstract: A chip device that includes a leadframe that has a die attach cavity. The memory device further includes a die that is placed within the die attach cavity. The die attach cavity is substantially the same thickness as the die. The die is positioned within the cavity and is attached therein with a standard die attachment procedure.
    Type: Grant
    Filed: September 11, 2003
    Date of Patent: September 5, 2006
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Honorio T. Granada, Rajeev Joshi, Connie Tangpuz
  • Method to manufacture a universal footprint for a package with exposed chip
    Publication number: 20060151861
    Abstract: A semiconductor die package is disclosed. It may include a semiconductor die having a first surface and a second surface, and a leadframe structure. A molding material may be formed around at least a portion of the die and at least a portion of the leadframe structure. A solderable layer may be on the exterior surface of the molding material and the first surface of the semiconductor die.
    Type: Application
    Filed: January 13, 2005
    Publication date: July 13, 2006
    Inventors: Jonathan Noquil, Connie Tangpuz, Romel Manatad, Stephen Martin, Rajeev Joshi, Venkat Iyer
  • Flip chip substrate design
    Publication number: 20050051878
    Abstract: A chip device that includes a leadframe that has a die attach cavity. The memory device further includes a die that is placed within the die attach cavity. The die attach cavity is substantially the same thickness as the die. The die is positioned within the cavity and is attached therein with a standard die attachment procedure.
    Type: Application
    Filed: September 11, 2003
    Publication date: March 10, 2005
    Applicant: Fairchild Semiconductor Corporation
    Inventors: Honorio Granada, Rajeev Joshi, Connie Tangpuz
  • Flip chip substrate design
    Patent number: 6661082
    Abstract: A chip device that includes a leadframe that has a die attach cavity. The memory device further includes a die that is placed within the die attach cavity. The die attach cavity is substantially the same thickness as the die. The die is positioned within the cavity and is attached therein with a standard die attachment procedure.
    Type: Grant
    Filed: July 19, 2000
    Date of Patent: December 9, 2003
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Honorio T. Granada, Rajeev Joshi, Connie Tangpuz