Abstract: Apparatus and a method for interfacing between the Internet and the Telephone Network. A time slot interchange is enhanced by the addition of a supplementary memory for storing data for accumulating Internet packets. When a packet has been accumulated, the appropriate header is inserted into the packet under the control of a routing processor, and the packet can then be sent as a group of adjacent PCM samples over a connection to the Internet. In other embodiments, information is sent to the Internet over a direct data pipe for transmitting ATM cells or Ethernet packets. A Vocoder signal processor can be inserted between the TSI memory, and the supplementary memory to convert PCM voice samples into vocoded voice samples for transmission over the Internet. A modem signal processor can be interposed between the TSI memory and the supplementary memory to convert between analog data (representing for example, shift key analog signals) and binary data for transmission within packets over the Internet.

Abstract: A large router for routing datagrams. The large router comprises a plurality of router slices, each of which receives switches and transmits datagrams. Each router slice has a routing memory for routing the packets. If a packet is received whose destination address is not known to the receiving packet slice, the packet slice broadcasts a request for routing information for that datagram to the other packet slices of the large router and routes the packet in accordance with the received responses. Groups of slices are interconnected by a time slot interchange (TSI) unit, and groups of TSIs are interconnected by a time multiplexed switch. The router can consist of more than one switch; the switches being interconnected by high speed data links. Advantageously, the router, though composed of small slices, acts as if it were a single large high capacity entity.

Abstract: Apparatus for permitting any of a plurality of driver circuits to control a select lead. In the preferred embodiment, the plurality of drivers are in separate peripheral component interconnect (PCI) host bridges. The drivers when active are in one of two low impedance states. A resistor whose impedance is substantially less than the high impedance of a driver when in the inactive state is connected to ground and pulls the voltage on the select lead toward ground when none of the drivers connected to the select lead are active. Advantageously, a plurality of drivers can control a single select lead, and only a short time is required as a guard interval between the time that two different drivers control the select lead.