Patents by Inventor Cory Groth

Cory Groth has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Apparatus and method for compensating clock period elongation during scan testing in an integrated circuit (IC)
    Publication number: 20060167645
    Abstract: An apparatus and method for compensating clock period elongation during scan testing in an integrated circuit (IC) comprises operating a clock associated with the IC at a frequency (fTARGET) at which IC operation is sought to be determined, measuring the actual clock period (TCLOCK—OUT) at a clock output, scan testing the IC, measuring the actual clock period (TSCAN—CLOCK—OUT) at the clock output, determining a delay by calculating the difference between TSCAN—CLOCK—OUT and TCLOCK—OUT, and compensating for the delay by increasing the clock frequency during scan test.
    Type: Application
    Filed: March 27, 2006
    Publication date: July 27, 2006
    Inventors: Richard Rogers, Jeffrey Rearick, Cory Groth
  • Apparatus and method for compensating clock period elongation during scan testing in an integrated circuit (IC)
    Publication number: 20050222795
    Abstract: An apparatus and method for compensating clock period elongation during scan testing in an integrated circuit (IC) comprises operating a clock associated with the IC at a frequency (fTARGET) at which IC operation is sought to be determined, measuring the actual clock period (TCLOCK—OUT) at a clock output, scan testing the IC, measuring the actual clock period (TSCAN—CLOCK—OUT) at the clock output, determining a delay by calculating the difference between TSCAN—CLOCK—OUT and TCLOCK—OUT, and compensating for the delay by increasing the clock frequency during scan test.
    Type: Application
    Filed: April 6, 2004
    Publication date: October 6, 2005
    Inventors: Richard Rodgers, Jeffrey Rearick, Cory Groth
  • Method and apparatus for synchronously transferring data across multiple clock domains
    Patent number: 6744285
    Abstract: A method and an apparatus for aligning the phases of clocks of different clock domains of an IC to enable data to be transferred synchronously across the clock domains. The present invention comprises a phase-alignment system that is adjustable via a user interface to enable the clock phases to be adjusted. A user controls the degree of alignment of the phases via the user interface. The present invention enables the phases of clocks of different clock domains to be adjusted even after the IC has been fabricated.
    Type: Grant
    Filed: August 8, 2002
    Date of Patent: June 1, 2004
    Assignee: Agilent Technologies, Inc.
    Inventors: Wayne G. Mangum, Brian C. Miller, Peter J. Meier, Cory Groth
  • Method and apparatus for synchronously transferring data across multiple clock domains
    Publication number: 20040027166
    Abstract: A method and an apparatus for aligning the phases of clocks of different clock domains of an IC to enable data to be transferred synchronously across the clock domains. The present invention comprises a phase-alignment system that is adjustable via a user interface to enable the clock phases to be adjusted. A user controls the degree of alignment of the phases via the user interface. The present invention enables the phases of clocks of different clock domains to be adjusted even after the IC has been fabricated.
    Type: Application
    Filed: August 8, 2002
    Publication date: February 12, 2004
    Inventors: Wayne G. Mangum, Brian C. Miller, Peter J. Meier, Cory Groth