Abstract: An apparatus and method for retaining a length of fiber optic cable to a circuit board includes a spool-shaped retention apparatus. A body portion of the apparatus includes a channel formed about the periphery of the body portion for receiving and retaining a portion of the length of fiber optic cable in an arc having a radius greater than a minimum bend radius of the fiber optic cable. A plurality of legs extend from the body portion, each of the legs is adapted to be received in a mounting opening formed in the PC board. Each of the spaced legs may include a foot portion adapted for securing the body to the circuit board.

Abstract: An apparatus and method for retaining a length of fiber optic cable to a circuit board includes a body portion. The body portion of the apparatus includes at least a pair of spaced legs extending from the body portion, each of the legs is adapted to be received in a mounting opening formed in the PC board. Each of the spaced legs includes a foot portion adapted for securing the body to the circuit board and at least a pair of spaced arms extend from the body portion defining a slot between the arm and the body portion for receiving and retaining a portion of the length of fiber optic cable. The arms are spaced a distance from each other for retaining the fiber optic cable in an arc having a radius greater than a minimum bend radius of the fiber optic cable.

Abstract: An apparatus and method for retaining a length of fiber optic cable to a circuit board includes a body portion. The body portion of the apparatus includes at least a pair of spaced legs extending from the body portion, each of the legs is adapted to be received in a mounting opening formed in the PC board. Each of the spaced legs includes a foot portion adapted for securing the body to the circuit board and at least a pair of spaced arms extend from the body portion defining a slot between the arm and the body portion for receiving and retaining a portion of the length of fiber optic cable. The arms are spaced a distance from each other for retaining the fiber optic cable in an arc having a radius greater than a minimum bend radius of the fiber optic cable.

Abstract: A line card connectable to a backplane connector includes a connector. The connector includes connector terminals, a subset of which are connected to an insertion monitoring circuit. The insertion monitoring circuit includes a power conductor connected to a first terminal of the subset. One or more pull up resistors are connected to the power conductor. One or more sense lines are connected to one or more second terminals of the subset. The first terminal is positioned on the card so as to be connectable to the backplane connector before the one or more second terminals. An insertion detection device is provided for detecting an insertion of the card. A state device is connected to the insertion detection device for calculating a primary insertion count from the detection of the insertion and a non-volatile memory device is connected to the state device for storing the primary insertion count.

Abstract: An apparatus and method for retaining a length of fiber optic cable to a circuit board includes a body portion. The body portion of the apparatus includes at least a pair of spaced legs extending from the body portion, each of the legs is adapted to be received in a mounting opening formed in the PC board. Each of the spaced legs includes a foot portion adapted for securing the body to the circuit board and at least a pair of spaced arms extend from the body portion defining a slot between the arm and the body portion for receiving and retaining a portion of the length of fiber optic cable. The arms are spaced a distance from each other for retaining the fiber optic cable in an arc having a radius greater than a minimum bend radius of the fiber optic cable.

Abstract: Disclosed is a method and apparatus for software configuration of a processor clock ratio. Boot code that the processor executes in response to a reset event correctly configures the clock ratio to a desired value, where the desired value can be set via a user interface. The processor then checks the clock ratio against a desired clock ratio value stored in a nonvolatile memory. If the clock ratio is the same as the desired clock ratio value, then the processor completes the boot of the processor. If the clock ratio is different from the desired value, then the processor writes the desired value into a latch connected to the on clock configuration input terminals of the processor and inhibits reset of the latch. The processor then generates another reset event. In this reset cycle, the processor will sense the desired clock ratio value driven onto the clock configuration input terminals by the latch and boot with the desired clock ratio.

Abstract: A system for shutting down and resetting an embedded system having a general purpose computing platform. A push button is provided for generating a push button reset signal to the shutdown and reset manager. The shutdown and reset manager receives the management reset signal and initiates a shutdown of the operating system. When the operating system has shutdown, the user presses the push button again. The second receipt of the push button reset signal initiates a hardware reset.

Abstract: A system for shutting down and resetting an embedded system having a general purpose computing platform. A shutdown management driver generates a management reset according to a predetermined set of shutdown conditions. The shutdown and reset manager receive the management reset signal and initiate a shutdown of the operating system. When the operating system has shutdown, the second receipt of the management reset signal initiates a hardware reset.

Abstract: Disclosed is a system and method for supplying power to multiple devices using a single voltage regulator. The present invention includes a comparator that compares the voltage identification codes from multiple devices in a system. If all the devices have the same value for the voltage identification code, then the comparator forwards the code to a voltage identification input of a programmable voltage regulator, which then outputs a power supply voltage at a level corresponding to the voltage identification code value of the devices. If any device present in the system has a different value for its voltage identification code, then the comparator outputs a predetermined value to the programmable voltage regulator that prevents the voltage regulator from outputting a power supply voltage.