Patents by Inventor Curtis Dicke

Curtis Dicke has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10164633
    Abstract: System and method for providing precision a self calibrating resistance circuit is described that provides for matching a reference resistor using dynamically configurable resistance networks. The resistor network is coupled to the connection, wherein the resistor network provides a configurable resistance across the connection. In addition, the resistor network comprises a digital resistor network and an analog resistor network. Also, the circuit includes control circuitry for configuring the configurable resistance based on a reference resistance of the reference resistor. The configurable resistance is configured by coarsely tuning the resistor network through the digital resistor network and fine tuning the resistor network through the analog resistor network.
    Type: Grant
    Filed: July 10, 2017
    Date of Patent: December 25, 2018
    Assignee: Invensas Corporation
    Inventors: Curtis Dicke, George Courville, David Edward Fisch, Randall Sandusky, Kent Stalnaker
  • Publication number: 20170310322
    Abstract: System and method for providing precision a self calibrating resistance circuit is described that provides for matching a reference resistor using dynamically configurable resistance networks. The resistor network is coupled to the connection, wherein the resistor network provides a configurable resistance across the connection. In addition, the resistor network comprises a digital resistor network and an analog resistor network. Also, the circuit includes control circuitry for configuring the configurable resistance based on a reference resistance of the reference resistor. The configurable resistance is configured by coarsely tuning the resistor network through the digital resistor network and fine tuning the resistor network through the analog resistor network.
    Type: Application
    Filed: July 10, 2017
    Publication date: October 26, 2017
    Applicant: Invensas Corporation
    Inventors: Curtis Dicke, George Courville, David Edward Fisch, Randall Sandusky, Kent Stalnaker
  • Patent number: 9705497
    Abstract: System and method for providing precision a self calibrating resistance circuit is described that provides for matching a reference resistor using dynamically configurable resistance networks. The resistor network is coupled to the connection, wherein the resistor network provides a configurable resistance across the connection. In addition, the resistor network comprises a digital resistor network and an analog resistor network. Also, the circuit includes control circuitry for configuring the configurable resistance based on a reference resistance of the reference resistor. The configurable resistance is configured by coarsely tuning the resistor network through the digital resistor network and fine tuning the resistor network through the analog resistor network.
    Type: Grant
    Filed: August 18, 2015
    Date of Patent: July 11, 2017
    Assignee: Invensas Corporation
    Inventors: Curtis Dicke, George Courville, David Fisch, Randall Sandusky, Kent Stalnaker
  • Publication number: 20160094223
    Abstract: System and method for providing precision a self calibrating resistance circuit is described that provides for matching a reference resistor using dynamically configurable resistance networks. The resistor network is coupled to the connection, wherein the resistor network provides a configurable resistance across the connection. In addition, the resistor network comprises a digital resistor network and an analog resistor network. Also, the circuit includes control circuitry for configuring the configurable resistance based on a reference resistance of the reference resistor. The configurable resistance is configured by coarsely tuning the resistor network through the digital resistor network and fine tuning the resistor network through the analog resistor network.
    Type: Application
    Filed: August 18, 2015
    Publication date: March 31, 2016
    Inventors: Curtis DICKE, George COURVILLE, David FISCH, Randall SANDUSKY, Kent STALNAKER
  • Patent number: 9111671
    Abstract: System and method for providing precision a self calibrating resistance circuit is described that provides for matching a reference resistor using dynamically configurable resistance networks. The resistor network is coupled to the connection, wherein the resistor network provides a configurable resistance across the connection. In addition, the resistor network comprises a digital resistor network and an analog resistor network. Also, the circuit includes control circuitry for configuring the configurable resistance based on a reference resistance of the reference resistor. The configurable resistance is configured by coarsely tuning the resistor network through the digital resistor network and fine tuning the resistor network through the analog resistor network.
    Type: Grant
    Filed: May 23, 2013
    Date of Patent: August 18, 2015
    Assignee: INVENSAS CORPORATION
    Inventors: Curtis Dicke, George Courville, David Fisch, Randall Sandusky, Kent Stalnaker
  • Publication number: 20140049356
    Abstract: System and method for providing precision a self calibrating resistance circuit is described that provides for matching a reference resistor using dynamically configurable resistance networks. The resistor network is coupled to the connection, wherein the resistor network provides a configurable resistance across the connection. In addition, the resistor network comprises a digital resistor network and an analog resistor network. Also, the circuit includes control circuitry for configuring the configurable resistance based on a reference resistance of the reference resistor. The configurable resistance is configured by coarsely tuning the resistor network through the digital resistor network and fine tuning the resistor network through the analog resistor network.
    Type: Application
    Filed: May 23, 2013
    Publication date: February 20, 2014
    Inventors: Curtis DICKE, George COURVILLE, David FISCH, Randall SANDUSKY, Kent STALNAKER
  • Patent number: 5731714
    Abstract: An off-chip driver circuit can operate in an output mode to drive a signal supplied at its input terminals to an output terminal. It can also operate in an input mode in which signals are driven from an external circuit via the output terminal onto the chip. In an output mode, the output terminal is clamped to reduce the effect of overshoot voltages, for example as a result of reflections from the external circuits.
    Type: Grant
    Filed: September 28, 1995
    Date of Patent: March 24, 1998
    Assignee: SGS-Thomson Microelectronics Limited
    Inventors: Trevor Monk, Curtis Dicke
  • Patent number: 5729157
    Abstract: An off-chip driver circuit having circuitry for providing protection against high voltages when the off-chip driver circuit is disabled is described. The circuitry for providing protection against high voltages utilizes a minimum number of transistors and therefore minimizes the chip area utilized by the off-chip driver circuit. An off-chip driver circuit has an input terminal and an output terminal. A pull-up transistor has a controllable path connected between a first power supply voltage and the output terminal of the off-chip driver circuit, and a control terminal connected to the input terminal via a pass gate connected to isolate the input terminal from high voltages applied to the output terminal. A control transistor has a controllable path connected between the control terminal of the pull-up transistor and the output terminal, and a control terminal connected to a control potential.
    Type: Grant
    Filed: July 25, 1995
    Date of Patent: March 17, 1998
    Assignee: SGS-Thomson Microelectronics Limited
    Inventors: Trevor Monk, Curtis Dicke