Patents by Inventor Curtiss D. Roberts

Curtiss D. Roberts has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Stacked metal inductor
    Patent number: 10854372
    Abstract: An inductor has a conductor layer formed by multiple concentric co-planar turns of a first metal layer (e.g., ultra-thick metal (UTM)) adapted to receive current at a frequency of at least one gigahertz. The multiple turns of the first metal layer proceed from an innermost turn to an outermost turn, and a stacking layer of a second metal is provided over each of the first metal layer turns except at least the innermost turn, thereby optimizing the Q of the inductor.
    Type: Grant
    Filed: November 15, 2018
    Date of Patent: December 1, 2020
    Assignee: Intel IP Corporation
    Inventors: Chi-Taou Robert Tsai, Lillian G. Lent, Curtiss D. Roberts, Cindy Muir
  • STACKED METAL INDUCTOR
    Publication number: 20190088405
    Abstract: An inductor has a conductor layer formed by multiple concentric co-planar turns of a first metal layer (e.g., ultra-thick metal (UTM)) adapted to receive current at a frequency of at least one gigahertz. The multiple turns of the first metal layer proceed from an innermost turn to an outermost turn, and a stacking layer of a second metal is provided over each of the first metal layer turns except at least the innermost turn, thereby optimizing the Q of the inductor.
    Type: Application
    Filed: November 15, 2018
    Publication date: March 21, 2019
    Inventors: Chi-Taou Robert Tsai, Lillian G. Lent, Curtiss D. Roberts, Cindy Muir
  • Bypass ring to improve noise isolation of coils and inductors
    Patent number: 9496231
    Abstract: An integrated circuit (IC) comprises a plurality of metal layers; a seal ring arranged around a perimeter of the IC and included in at least a portion of the plurality of metal layers; a first coil included in the IC; and a bypass conductor included in at least one metal layer of the plurality of metal layers and having at least a first end and a second end electrically coupled to the seal ring to form a bypass ring around the first coil.
    Type: Grant
    Filed: December 3, 2015
    Date of Patent: November 15, 2016
    Assignee: Intel IP Corporation
    Inventors: Chi-Taou Robert Tsai, Curtiss D. Roberts, Lillian G. Lent