Patents by Inventor Cynthia S. Milkovich
Cynthia S. Milkovich has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7278207Abstract: An electronic package and method of making the electronic package is provided. A layer of dielectric material is positioned on a first surface of a substrate which includes a plurality of conductive contacts. At least one through hole is formed in the layer of dielectric material in alignment with at least one of the plurality of conductive contacts. A conductive material is positioned in the at least one through hole substantially filling the through hole. At least one conductive member is positioned on the conductive material in the through hole and in electrical contact with the conductive material. The electronic package improves field operating life of an assembly which includes a semiconductor chip attached to a second surface of the substrate and a printed wiring board attached to the conductive members.Type: GrantFiled: July 15, 2005Date of Patent: October 9, 2007Assignee: International Business Machines CorporationInventors: Lisa J. Jimarez, Miguel A. Jimarez, Voya R. Markovich, Cynthia S. Milkovich, Charles H. Perry, Brenda L. Peterson
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Patent number: 6961995Abstract: An electronic package and method of making the electronic package is provided. A layer of dielectric material is positioned on a first surface of a substrate which includes a plurality of conductive contacts. At least one through hole is formed in the layer of dielectric material in alignment with at least one of the plurality of conductive contacts. A conductive material is positioned in the at least one through hole substantially filling the through hole. At least one conductive member is positioned on the conductive material in the through hole and in electrical contact with the conductive material. The electronic package improves field operating life of an assembly which includes a semiconductor chip attached to a second surface of the substrate and a printed wiring board attached to the conductive members.Type: GrantFiled: September 19, 2002Date of Patent: November 8, 2005Assignee: International Business Machines CorporationInventors: Lisa J. Jimarez, Miguel A. Jimarez, Voya R. Markovich, Cynthia S. Milkovich, Charles H. Perry, Brenda L. Peterson
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Patent number: 6955982Abstract: An electrical structure, and associated method of fabrication, for reducing thermally induced strain in a structure that couples a first conductive body of a first substrate to a second conductive body of a second substrate (e.g., a chip to a chip carrier; a chip carrier to a circuit card). The melting point of the first conductive body exceeds the melting point of the second conductive body. The second conductive body may include eutectic lead-tin alloy, while the first conductive body may include non-eutectic lead-tin alloy. A portion of the first conductive body is coated with, or volumetrically surrounded by, a material that is nonsolderable and nonconductive. The first and second conductive bodies are coupled mechanically and electrically by surface adhesion at an uncoated portion of the first conductive body, by application of a temperature that lies between the melting points of the first and second conductive bodies.Type: GrantFiled: November 18, 2003Date of Patent: October 18, 2005Assignee: International Business Machines CorporationInventors: Miguel A. Jimarez, Cynthia S. Milkovich, Mark V. Pierson
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Patent number: 6756680Abstract: An electrical structure, and associated method of fabrication, for reducing thermally induced strain in a structure that couples a first conductive body of a first substrate to a second conductive body of a second substrate (e.g., a chip to a chip carrier; a chip carrier to a circuit card). The melting point of the first conductive body exceeds the melting point of the second conductive body. The second conductive body may include eutectic lead-tin alloy, while the first conductive body may include non-eutectic lead-tin alloy. A portion of the first conductive body is coated with, or volumetrically surrounded by, a material that is nonsolderable and nonconductive. The first and second conductive bodies are coupled mechanically and electrically by surface adhesion at an uncoated portion of the first conductive body, by application of a temperature that lies between the melting points of the first and second conductive bodies.Type: GrantFiled: February 12, 2001Date of Patent: June 29, 2004Assignee: International Business Machines CorporationInventors: Miguel A. Jimarez, Cynthia S. Milkovich, Mark V. Pierson
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Publication number: 20040094842Abstract: An electrical structure, and associated method of fabrication, for reducing thermally induced strain in a structure that couples a first conductive body of a first substrate to a second conductive body of a second substrate (e.g., a chip to a chip carrier; a chip carrier to a circuit card). The melting point of the first conductive body exceeds the melting point of the second conductive body. The second conductive body may include eutectic lead-tin alloy, while the first conductive body may include non-eutectic lead-tin alloy. A portion of the first conductive body is coated with, or volumetrically surrounded by, a material that is nonsolderable and nonconductive. The first and second conductive bodies are coupled mechanically and electrically by surface adhesion at an uncoated portion of the first conductive body, by application of a temperature that lies between the melting points of the first and second conductive bodies.Type: ApplicationFiled: November 18, 2003Publication date: May 20, 2004Inventors: Miguel A. Jimarez, Cynthia S. Milkovich, Mark V. Pierson
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Publication number: 20030020150Abstract: An electronic package and method of making the electronic package is provided. A layer of dielectric material is positioned on a first surface of a substrate which includes a plurality of conductive contacts. At least one through hole is formed in the layer of dielectric material in alignment with at least one of the plurality of conductive contacts. A conductive material is positioned in the at least one through hole substantially filling the through hole. At least one conductive member is positioned on the conductive material in the through hole and in electrical contact with the conductive material. The electronic package improves field operating life of an assembly which includes a semiconductor chip attached to a second surface of the substrate and a printed wiring board attached to the conductive members.Type: ApplicationFiled: September 19, 2002Publication date: January 30, 2003Applicant: International Business Machines CorporationInventors: Lisa J. Jimarez, Miguel A. Jimarez, Voya R. Markovich, Cynthia S. Milkovich, Charles H. Perry, Brenda L. Peterson
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Patent number: 6486415Abstract: An electronic package and method of making the electronic package is provided. A layer of dielectric material is positioned on a first surface of a substrate which includes a plurality of conductive contacts. At least one through hole is formed in the layer of dielectric material in alignment with at least one of the plurality of conductive contacts. A conductive material is positioned in the at least one through hole substantially filling the through hole. At least one conductive member is positioned on the conductive material in the through hole and in electrical contact with the conductive material. The electronic package improves field operating life of an assembly which includes a semiconductor chip attached to a second surface of the substrate and a printed wiring board attached to the conductive members.Type: GrantFiled: January 16, 2001Date of Patent: November 26, 2002Assignee: International Business Machines CorporationInventors: Lisa J. Jimarez, Miguel A. Jimarez, Voya R. Markovich, Cynthia S. Milkovich, Charles H. Perry, Brenda L. Peterson
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Publication number: 20020092676Abstract: An electronic package and method of making the electronic package is provided. A layer of dielectric material is positioned on a first surface of a substrate which includes a plurality of conductive contacts. At least one through hole is formed in the layer of dielectric material in alignment with at least one of the plurality of conductive contacts. A conductive material is positioned in the at least one through hole substantially filling the through hole. At least one conductive member is positioned on the conductive material in the through hole and in electrical contact with the conductive material. The electronic package improves field operating life of an assembly which includes a semiconductor chip attached to a second surface of the substrate and a printed wiring board attached to the conductive members.Type: ApplicationFiled: January 16, 2001Publication date: July 18, 2002Inventors: Lisa J. Jimarez, Miguel A. Jimarez, Voya R. Markovich, Cynthia S. Milkovich, Charles H. Perry, Brenda L. Peterson
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Publication number: 20010018230Abstract: An electrical structure, and associated method of fabrication, for reducing thermally induced strain in a structure that couples a first conductive body of a first substrate to a second conductive body of a second substrate (e.g., a chip to a chip carrier; a chip carrier to a circuit card). The melting point of the first conductive body exceeds the melting point of the second conductive body. The second conductive body may include eutectic lead-tin alloy, while the first conductive body may include non-eutectic lead-tin alloy. A portion of the first conductive body is coated with, or volumetrically surrounded by, a material that is nonsolderable and nonconductive. The first and second conductive bodies are coupled mechanically and electrically by surface adhesion at an uncoated portion of the first conductive body, by application of a temperature that lies between the melting points of the first and second conductive bodies.Type: ApplicationFiled: February 12, 2001Publication date: August 30, 2001Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Miguel A. Jimarez, Cynthia S. Milkovich, Mark V. Pierson
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Publication number: 20010013423Abstract: A structure and method is disclosed for directly attaching a device or package on flexible organic circuit carriers having low cost and high reliability.Type: ApplicationFiled: September 18, 1997Publication date: August 16, 2001Inventors: HORMAZDYAR M. DALAL, KENNETH M. FALLON, GENE J. GAUDENZI, CYNTHIA S. MILKOVICH
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Patent number: 6100114Abstract: Solder bumps on electronic components are encapsulated before attachment to a substrate or component carrier. A film of sealing material is pressed against top portions of the solder bumps by pressing with a layer of low durometer flexible material. Encapsulant is positioned between the component and the film and in contact with the bumps, and partially cured. The film and layer of flexible material are removed to expose the top portions of the encapsulated solder bumps.Type: GrantFiled: August 10, 1998Date of Patent: August 8, 2000Assignee: International Business Machines CorporationInventors: Cynthia S. Milkovich, Mark V. Pierson, Son K. Tran
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Patent number: 5969945Abstract: A screen printing fixture holds a flexible circuit board having components attached to one side, to allow screening a pattern of solder paste onto the second side for subsequent attachment of components to that side. In an electronic package assembly a flexible circuit board with components is wound about a heat spreader assembly having a cavity so that at least one component on the flexible circuit board is positioned within the cavity and in thermal connection to the heat spreader.Type: GrantFiled: February 27, 1997Date of Patent: October 19, 1999Assignee: International Business Machines CorporationInventors: Lawrence R. Cutting, Michael A. Gaynes, Eric A. Johnson, Cynthia S. Milkovich, Jeffrey S. Perkins, Mark V. Pierson, Steven E. Poetzinger, Jerzy Zalesinski
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Patent number: 5831828Abstract: A multi-layer flexible circuit board has thicker regions to which surface-mount-technology (SMT) components (such as flip chips and QFPs) and pin-in-hole (PIH) components are mounted on both sides and which contains conductive through vias between wiring layers. After the SMT components have been mounted to the first side, a screening fixture with a support surface that has cavities conforming the components on the first side, is used to screen solder paste to the other side of the board. The thicker regions are surrounded by thinner regions of the board with fewer wiring layers and preferably fewer or thinner dielectric layers, and which can be bent along a line without bending the thicker regions. A common heat spreader plate with cavities or holes for multiple components is laminated to the thicker regions on one side of the board. The thicker regions have windows in which wire-bond chips are mounted to the heat spreader and the chips are wirebonded to the other side of the board.Type: GrantFiled: June 3, 1993Date of Patent: November 3, 1998Assignee: International Business Machines CorporationInventors: Lawrence R. Cutting, Michael A. Gaynes, Eric A. Johnson, Cynthia S. Milkovich, Jeffrey S. Perkins, Mark V. Pierson, Steven E. Poetzinger, Jerzy Zalesinski
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Patent number: 5759269Abstract: A screen printing machine comprising a backing plate with holes conforming to components attached to the surface of a flexible circuit board. The machine includes a screen which patterns solder paste on the surface of the circuit board while the circuit board is on the backing plate. Also included is a spring loaded element disposed adjacent to the backing plate which applies a predetermined continuous force to the four corners of the circuit board. This force is applied in a diagonal direction to the corners to stretch the circuit board so that the circuit board is parallel to the backing plate during screening.Type: GrantFiled: June 6, 1995Date of Patent: June 2, 1998Assignee: International Business Machines CorporationInventors: Lawrence R. Cutting, Michael A. Gaynes, Eric A. Johnson, Cynthia S. Milkovich, Jeffrey S. Perkins, Mark V. Pierson, Steven E. Poetzinger, Jerzy Zalesinski
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Patent number: 5729896Abstract: A structure and method is disclosed for directly attaching a device or package on flexible organic circuit carriers having low cost and high reliability. IC chips with a new solder interconnect structure, comprised of a layer of pure tin, deposited on the top of high melting Pb--Sn solder balls are employed for joining. These methods, techniques and metallurgical structures enables direct attachment of electronic devices of any complexity to any substrate and to any level of packaging hierarchy. Also, devices or packages having other joining technologies, eg. SMT, BGA, TBGA, etc. could be joined onto the flexible circuit carrier.Type: GrantFiled: October 31, 1996Date of Patent: March 24, 1998Assignee: International Business Machines CorporationInventors: Hormazdyar M. Dalal, Kenneth M. Fallon, Gene J. Gaudenzi, Cynthia S. Milkovich
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Patent number: 5638597Abstract: A multi-layer flexible circuit board has multiple thicker regions to which components are mounted and thinner, more flexible regions with fewer wiring layers through which the board can be bent about a line without bending thicker regions. Surface mount components such as QFP's and flip-chips are mounted on the front side, and surface mount and pin-in-hole components are mounted on the back side of the circuit board at the thick regions. Heat spreaders are laminated to the back sides of thicker regions. The thicker regions have windows in which wire bond chips are mounted on the heat spreader and wire bonded to the front side of the board. A thermally conductive adhesive or grease connects between the tops of the back side components and the bottoms of the cavities. The heat sinks are bolted together and/or to an enclosure frame to improve thermal performance.Type: GrantFiled: June 7, 1995Date of Patent: June 17, 1997Assignee: International Business Machines CorporationInventors: Lawrence R. Cutting, Michael A. Gaynes, Eric A. Johnson, Cynthia S. Milkovich, Jeffrey S. Perkins, Mark V. Pierson, Steven E. Poetzinger, Jerzy Zalesinski