Patents by Inventor D. Ross ECONOMY

D. Ross ECONOMY has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Metal-nitride-free via in stacked memory
    Patent number: 10658297
    Abstract: A nonvolatile memory device includes a metal silicon nitride layer on a three-dimensional (3D) crosspoint architecture, where the metal silicon nitride layer is in the memory array processing. The metal silicon nitride layer is patterned in accordance with the memory array structure, rather than being an underlying layer for a metal layer. The metal layer provides bitline or wordline select paths, and can connect to a via in parallel with the memory array stack. The metal silicon nitride layer is between the metal layer and the memory array, and is not present over the via.
    Type: Grant
    Filed: June 30, 2018
    Date of Patent: May 19, 2020
    Assignee: Intel Corporation
    Inventors: Andrea Redaelli, D. Ross Economy, Mihir Bohra
  • METAL-NITRIDE-FREE VIA IN STACKED MEMORY
    Publication number: 20190043807
    Abstract: A nonvolatile memory device includes a metal silicon nitride layer on a three-dimensional (3D) crosspoint architecture, where the metal silicon nitride layer is in the memory array processing. The metal silicon nitride layer is patterned in accordance with the memory array structure, rather than being an underlying layer for a metal layer. The metal layer provides bitline or wordline select paths, and can connect to a via in parallel with the memory array stack. The metal silicon nitride layer is between the metal layer and the memory array, and is not present over the via.
    Type: Application
    Filed: June 30, 2018
    Publication date: February 7, 2019
    Inventors: Andrea REDAELLI, D. Ross ECONOMY, Mihir BOHRA