Patents by Inventor Da Eun SONG

Da Eun SONG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11775212
    Abstract: A data storage device includes a first memory device storing first data; a second memory device including a first zone storing second data, a second zone storing third data, and a third zone storing fourth data; a storage; and a controller in communication with the first memory device, the second memory device, and the storage and configured to receive one or more requests from a host and control an input and output of data from and to the first memory device, the second memory device, and the storage in response to the one or more requests from the host. The controller is further configured to copy a portion of the first data read from the first memory device to the first zone, copy a portion of the second data read from the first zone to the second zone, copy a portion of the third data read from the second zone to the third zone, and store data read more than a set number of times among data stored in the first memory device and the second memory device in the third zone.
    Type: Grant
    Filed: March 1, 2021
    Date of Patent: October 3, 2023
    Assignee: SK HYNIX INC.
    Inventor: Da Eun Song
  • Patent number: 11513960
    Abstract: A data storage device includes a first memory device; a second memory device including a fetch region configured to store data evicted from the first memory device and a prefetch region divided into a plurality of sections; storage; and a controller configured to control the first memory device, the second memory device, and the storage. The controller may include a memory manager configured to select prefetch data having a set section size from the storage, load the selected prefetch data into the prefetch region and update the prefetch data based on a data read hit ratio of each of the plurality of sections.
    Type: Grant
    Filed: January 13, 2021
    Date of Patent: November 29, 2022
    Assignee: SK hynix Inc.
    Inventor: Da Eun Song
  • Patent number: 11243718
    Abstract: A data storage apparatus may include a first memory device comprising a first area in which write data from a host device are stored and a second area, a second memory device into which the write data stored in the first memory device are copied, a storage device, and a controller. The controller is configured to control data input/output for the first memory device, the second memory device and the storage device, wherein the controller comprises a cache manager configured to evict eviction target data from the second memory device by: storing the eviction target data into the storage device, and storing the eviction target data into the second area of the first memory device.
    Type: Grant
    Filed: June 18, 2020
    Date of Patent: February 8, 2022
    Assignee: SK hynix Inc.
    Inventor: Da Eun Song
  • Publication number: 20220004340
    Abstract: A data storage device includes a first memory device storing first data; a second memory device including a first zone storing second data, a second zone storing third data, and a third zone storing fourth data; a storage; and a controller in communication with the first memory device, the second memory device, and the storage and configured to receive one or more requests from a host and control an input and output of data from and to the first memory device, the second memory device, and the storage in response to the one or more requests from the host. The controller is further configured to copy a portion of the first data read from the first memory device to the first zone, copy a portion of the second data read from the first zone to the second zone, copy a portion of the third data read from the second zone to the third zone, and store data read more than a set number of times among data stored in the first memory device and the second memory device in the third zone.
    Type: Application
    Filed: March 1, 2021
    Publication date: January 6, 2022
    Inventor: Da Eun SONG
  • Publication number: 20210382824
    Abstract: A data storage device includes a first memory device; a second memory device including a fetch region configured to store data evicted from the first memory device and a prefetch region divided into a plurality of sections; storage; and a controller configured to control the first memory device, the second memory device, and the storage. The controller may include a memory manager configured to select prefetch data having a set section size from the storage, load the selected prefetch data into the prefetch region and update the prefetch data based on a data read hit ratio of each of the plurality of sections.
    Type: Application
    Filed: January 13, 2021
    Publication date: December 9, 2021
    Inventor: Da Eun SONG
  • Publication number: 20210191655
    Abstract: A data storage apparatus may include a first memory device comprising a first area in which write data from a host device are stored and a second area, a second memory device into which the write data stored in the first memory device are copied, a storage device, and a controller. The controller is configured to control data input/output for the first memory device, the second memory device and the storage device, wherein the controller comprises a cache manager configured to evict eviction target data from the second memory device by: storing the eviction target data into the storage device, and storing the eviction target data into the second area of the first memory device.
    Type: Application
    Filed: June 18, 2020
    Publication date: June 24, 2021
    Inventor: Da Eun SONG
  • Patent number: 10459794
    Abstract: A memory system includes a first memory device, a second memory device, and a controller. The second memory device has a write endurance which is higher than a write endurance of the first memory device. The controller performs an error correction process on original data outputted from a host to generate a codeword including the original data and parity data. The controller separates the codeword into the original data and the parity data to write the separated original data into the first memory device and to write the separated parity data into the second memory device.
    Type: Grant
    Filed: November 22, 2017
    Date of Patent: October 29, 2019
    Assignee: SK hynix Inc.
    Inventors: Jinho Baek, Il Park, Da Eun Song, Hokyoon Lee, Youngpyo Joo
  • Publication number: 20180225173
    Abstract: A memory system includes a first memory device, a second memory device, and a controller. The second memory device has a write endurance which is higher than a write endurance of the first memory device. The controller performs an error correction process on original data outputted from a host to generate a codeword including the original data and parity data. The controller separates the codeword into the original data and the parity data to write the separated original data into the first memory device and to write the separated parity data into the second memory device.
    Type: Application
    Filed: November 22, 2017
    Publication date: August 9, 2018
    Applicant: SK hynix Inc.
    Inventors: Jinho BAEK, Il PARK, Da Eun SONG, Hokyoon LEE, Youngpyo JOO