Abstract: Image sensors for Phase-Detection Auto Focus (PDAF) are provided. An image sensor includes a pixel including a plurality of photodiodes disposed in a semiconductor material according to an arrangement. The arrangement defines a first image subpixel comprising a plurality of first photodiodes, a second image subpixel comprising a plurality of second photodiodes, and a third image subpixel including a plurality of third photodiodes, and a phase detection subpixel comprising a first photodiode, a second photodiode, or a third photodiodes. The pixel can include a plurality of first micro-lenses disposed individually overlying at least a subset of the plurality of photodiodes of the first, second and third image subpixels. The pixel can also include a second micro-lens disposed overlying the phase detection subpixel, a first micro-lens of the first micro-lenses having a first radius less than a second radius of the second micro-lens.

Abstract: Half Quad Photodiode (QPD) for improving QPD channel imbalance. In one embodiment, an image sensor includes a plurality of pixels arranged in rows and columns of a pixel array that is disposed in a semiconductor material. Each pixel includes a plurality of subpixels. Each subpixel comprises a plurality of first photodiodes, a plurality of second photodiodes and a plurality of third photodiodes. The plurality of pixels are configured to receive incoming light through an illuminated surface of the semiconductor material. A plurality of small microlenses are individually distributed over individual first photodiodes and individual second photodiodes of each subpixel. A plurality of large microlenses are each distributed over a plurality of third photodiodes of each subpixel. A diameter of the small microlenses is smaller than a diameter of the large microlenses.

Abstract: An image sensor pixel includes a plurality of photodiodes, a shared microlens, and a plurality of microlenses. The plurality of photodiodes are arranged as a photodiode array with each of the plurality of photodiodes disposed within a semiconductor material. The shared microlens is optically aligned with a group of neighboring photodiodes included in the plurality of photodiodes. Each of the plurality of microlenses are optically aligned with an individual one of the plurality of photodiodes other than the group of neighboring photodiodes. The plurality of microlenses laterally surrounds the shared microlens.

Abstract: An imaging device includes a photodiode array. The photodiodes include a first set of photodiodes configured as image sensing photodiodes and a second set of photodiodes configured as phase detection auto focus (PDAF) photodiodes. The PDAF photodiodes are arranged in at least pairs in neighboring columns and are interspersed among the image sensing photodiodes. Transfer transistors are coupled to corresponding photodiodes. The transfer transistors coupled to the image sensing photodiodes included in an active row of are controlled in response to a first transfer control signal or a second transfer control signal that control all of the image sensing photodiodes of the active row. A transfer transistor is coupled to one of a pair of the PDAF photodiodes of the active row. The first transfer transistor is controlled in response to a first PDAF control signal that is independent of the first or second transfer control signals.

Abstract: An image sensor includes a plurality of photodiodes, a plurality of color filters, and a plurality of microlenses. The plurality of photodiodes are arranged as a photodiode array, each of the plurality of photodiodes disposed within respective portions of a semiconductor material with a first lateral area. The plurality of color filters are arranged as a color filter array optically aligned with the photodiode array. Each of the plurality of color filters having a second lateral area greater than the first lateral area. The plurality of microlenses are arranged as a microlens array optically aligned with the color filter array and the photodiode array. Each of the plurality of microlenses have a third later area greater than the first lateral area and less than the second lateral area.

Abstract: An imaging device includes a photodiode array. The photodiodes include a first set of photodiodes configured as image sensing photodiodes and a second set of photodiodes configured as phase detection auto focus (PDAF) photodiodes. The PDAF photodiodes are arranged in at least pairs in neighboring columns and are interspersed among the image sensing photodiodes. Transfer transistors are coupled to corresponding photodiodes. The transfer transistors coupled to the image sensing photodiodes included in an active row of are controlled in response to a first transfer control signal or a second transfer control signal that control all of the image sensing photodiodes of the active row. A transfer transistor is coupled to one of a pair of the PDAF photodiodes of the active row. The first transfer transistor is controlled in response to a first PDAF control signal that is independent of the first or second transfer control signals.

Abstract: An image sensor includes a plurality of photodiodes, a plurality of color filters, and a plurality of microlenses. The plurality of photodiodes are arranged as a photodiode array, each of the plurality of photodiodes disposed within respective portions of a semiconductor material with a first lateral area. The plurality of color filters are arranged as a color filter array optically aligned with the photodiode array. Each of the plurality of color filters having a second lateral area greater than the first lateral area. The plurality of microlenses are arranged as a microlens array optically aligned with the color filter array and the photodiode array. Each of the plurality of microlenses have a third later area greater than the first lateral area and less than the second lateral area.

Abstract: An image sensor pixel includes a plurality of photodiodes, a shared microlens, and a plurality of microlenses. The plurality of photodiodes are arranged as a photodiode array with each of the plurality of photodiodes disposed within a semiconductor material. The shared microlens is optically aligned with a group of neighboring photodiodes included in the plurality of photodiodes. Each of the plurality of microlenses are optically aligned with an individual one of the plurality of photodiodes other than the group of neighboring photodiodes. The plurality of microlenses laterally surrounds the shared microlens.

Abstract: The present disclosure provides a system and method for managing a four-switch BUCKBOOST converter with a combination of a Constant Off-time (COT) control and a Peak Current Mode (PCM) control. With the COT control, the four-switch BUCKBOOST converter can automatically and smoothly transition between a BUCK mode, a BUCKBOOST mode, and a BOOST mode when input voltage varies. In some implementations, the four-switch BUCKBOOST converter only requires a simple, low-power-consumption and robust system control loop compensation with the PCM control for inductor current, and, thus, eliminates the need for oscillator and slope compensation circuit. The PCM control is used to determine turn-off-timing of switches of the four-switch BUCKBOOST converter. The system control loop compensation can provide cycle-by-cycle current limit function to protect the converter and load from over-current damages.

Abstract: A synchronous buck direct current to direct current (DC-DC) converter includes a signal output terminal, an output stage circuit, a first comparator, a latch, a control logic circuit, a driver circuit and an on-time control circuit. The output stage circuit provides an output voltage to the signal output terminal according to an input voltage. The first comparator receives a reference voltage and a feedback signal related to the output voltage and outputs a control signal. The latch receives the control signal and a timing signal and outputs an on-enable signal. The control logic circuit receives the on-enable signal and outputs an on-control signal. The driver circuit controls charge/discharge time of the output stage circuit according to the on-control signal. The on-time control circuit receives the on-control signal and the input voltage and outputs the timing signal related to a duty cycle of the output stage circuit.

Abstract: A synchronous buck direct current to direct current (DC-DC) converter includes a signal output terminal, an output stage circuit, a first comparator, a latch, a control logic circuit, a driver circuit and an on-time control circuit. The output stage circuit provides an output voltage to the signal output terminal according to an input voltage. The first comparator receives a reference voltage and a feedback signal related to the output voltage and outputs a control signal. The latch receives the control signal and a timing signal and outputs an on-enable signal. The control logic circuit receives the on-enable signal and outputs an on-control signal. The driver circuit controls charge/discharge time of the output stage circuit according to the on-control signal. The on-time control circuit receives the on-control signal and the input voltage and outputs the timing signal related to a duty cycle of the output stage circuit.