Abstract: An isolation structure of a semiconductor, a semiconductor device having the same, and a method for fabricating the isolation structure are provided. An isolation structure of a semiconductor device may include a trench formed in a substrate, an oxide layer formed on a bottom surface and an inner sidewall of the trench, a filler formed on the oxide layer to fill a part of inside of the trench, and a fourth oxide layer filling an upper portion of the filler of the trench to a height above an upper surface of the trench, an undercut structure being formed on a boundary area between the inner sidewall and the oxide layer.

Abstract: A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes: a deep trench in a substrate; a sidewall insulating film on a side surface of the deep trench; an interlayer insulating film on the sidewall insulating film; and an air gap in the interlayer insulating film.

Abstract: A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes: a deep trench in a substrate; a sidewall insulating film on a side surface of the deep trench; an interlayer insulating film on the sidewall insulating film; and an air gap in the interlayer insulating film.

Abstract: A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes: a deep trench in a substrate; a sidewall insulating film on a side surface of the deep trench; an interlayer insulating film on the sidewall insulating film; and an air gap in the interlayer insulating film.

Abstract: An isolation structure of a semiconductor, a semiconductor device having the same, and a method for fabricating the isolation structure are provided. An isolation structure of a semiconductor device may include a trench formed in a substrate, an oxide layer formed on a bottom surface and an inner sidewall of the trench, a filler formed on the oxide layer to fill a part of inside of the trench, and a fourth oxide layer filling an upper portion of the filler of the trench to a height above an upper surface of the trench, an undercut structure being formed on a boundary area between the inner sidewall and the oxide layer.

Abstract: An isolation structure of a semiconductor, a semiconductor device having the same, and a method for fabricating the isolation structure are provided. An isolation structure of a semiconductor device may include a trench formed in a substrate, an oxide layer formed on a bottom surface and an inner sidewall of the trench, a filler formed on the oxide layer to fill a part of inside of the trench, and a fourth oxide layer filling an upper portion of the filler of the trench to a height above an upper surface of the trench, an undercut structure being formed on a boundary area between the inner sidewall and the oxide layer.

Abstract: A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes: a deep trench in a substrate; a sidewall insulating film on a side surface of the deep trench; an interlayer insulating film on the sidewall insulating film; and an air gap in the interlayer insulating film.

Abstract: An isolation structure of a semiconductor, a semiconductor device having the same, and a method for fabricating the isolation structure are provided. An isolation structure of a semiconductor device may include a trench formed in a substrate, an oxide layer formed on a bottom surface and an inner sidewall of the trench, a filler formed on the oxide layer to fill a part of inside of the trench, and a fourth oxide layer filling an upper portion of the filler of the trench to a height above an upper surface of the trench, an undercut structure being formed on a boundary area between the inner sidewall and the oxide layer.

Abstract: The present invention discloses a nonvolatile memory device which can improve the data storage capacity without increasing the surface area of the device, and a method for manufacturing the same. The nonvolatile memory device comprises: a gate of a stack type structure formed on an active region of a semiconductor substrate; a source/drain formed in the substrate at both sides of the gate of the stack type structure; an interlayer insulating film formed on the substrate where the source/drain is formed and covering the gate of the stack type structure; a contact connected to the source/drain through the interlayer insulating film; a plurality of conductive patterns formed in the interlayer insulating film of the region not adjacent to the contact; and an electrode pad formed on the conductive patterns.

Abstract: The present invention discloses a nonvolatile memory device which can improve the data storage capacity without increasing the surface area of the device, and a method for manufacturing the same. The nonvolatile memory device comprises: a gate of a stack type structure formed on an active region of a semiconductor substrate; a source/drain formed in the substrate at both sides of the gate of the stack type structure; an interlayer insulating film formed on the substrate where the source/drain is formed and covering the gate of the stack type structure; a contact connected to the source/drain through the interlayer insulating film; a plurality of conductive patterns formed in the interlayer insulating film of the region not adjacent to the contact; and an electrode pad formed on the conductive patterns.

Abstract: The present invention discloses a nonvolatile memory device which can improve the data storage capacity without increasing the surface area of the device, and a method for manufacturing the same. The nonvolatile memory device comprises: a gate of a stack type structure formed on an active region of a semiconductor substrate; a source/drain formed in the substrate at both sides of the gate of the stack type structure; an interlayer insulating film formed on the substrate where the source/drain is formed and covering the gate of the stack type structure; a contact connected to the source/drain through the interlayer insulating film; a plurality of conductive patterns formed in the interlayer insulating film of the region not adjacent to the contact; and an electrode pad formed on the conductive patterns.

Abstract: The present invention discloses a nonvolatile memory device which can improve the data storage capacity without increasing the surface area of the device, and a method for manufacturing the same. The nonvolatile memory device comprises: a gate of a stack type structure formed on an active region of a semiconductor substrate; a source/drain formed in the substrate at both sides of the gate of the stack type structure; an interlayer insulating film formed on the substrate where the source/drain is formed and covering the gate of the stack type structure; a contact connected to the source/drain through the interlayer insulating film; a plurality of conductive patterns formed in the interlayer insulating film of the region not adjacent to the contact; and an electrode pad formed on the conductive patterns.

Abstract: The present invention discloses a method for manufacturing a nonvolatile memory transistor capable of minimizing the area when adapted to the technology of sub-micron.

Abstract: The present invention discloses a method for manufacturing a nonvolatile memory transistor capable of minimizing the area when adapted to the technology of sub-micron.

Abstract: In a high voltage device and a method for fabricating the same, a semiconductor substrate includes first, second, and third regions, the second and third regions neighboring the first region with boundaries. The first and second drift regions are respectively formed in the second and third regions at a first depth. Insulating films are formed at a second depth less than the first depth, having a predetermined width respectively based on the boundary between the first and second regions and the boundary between the first and third regions. A channel ion injection region is formed with a variable depth along a surface of the semiconductor substrate belonging to the first region and the insulating films. A gate insulating film is formed on the channel ion injection region, partially overlapping the insulating films at both sides around the channel ion injection region.

Abstract: In a high voltage transistor and a method for fabricating the same, a semiconductor substrate includes first, second, and third regions, the second and third regions neighboring the first region with boundaries. The first and second drift regions are respectively formed in the second and third regions at a first depth. Insulating films are formed at a second depth less than the first depth, having a predetermined width respectively based on the boundary between the first and second regions and the boundary between the first and third regions. A channel ion injection region is formed with a variable depth along a surface of the semiconductor substrate belonging to the first region and the insulating films. A gate insulating film is formed on the channel ion injection region, partially overlapping the insulating films at both sides around the channel ion injection region.

Abstract: A high voltage device and a method for fabricating the same are disclosed, which improves voltage-resistant characteristics to protect against high voltage applied to a gate electrode. The high voltage device includes a semiconductor substrate having first, second and third regions, the first region having sidewalls at both sides, and the second and third regions having a height higher than that of the first region at both sides of the first region. A channel region is formed within a surface of the substrate belonging to the first region including some of the sidewalls. A first insulating film is formed on a surface of the first region including the sidewalls. Buffer conductive films are formed to be adjacent to the sidewalls of the first region and isolated from each other. A second insulating film is formed between the buffer conductive films to have a recess portion. A third insulating film is formed on an entire surface including the buffer conductive films.

Abstract: A high voltage device and a method for fabricating the same are disclosed, which improves voltage-resistant characteristics to protect against high voltage applied to a gate electrode. The high voltage device includes a semiconductor substrate having first, second and third regions, the first region having sidewalls at both sides, and the second and third regions having a height higher than that of the first region at both sides of the first region. A channel region is formed within a surface of the substrate belonging to the first region including some of the sidewalls. A first insulating film is formed on a surface of the first region including the sidewalls. Buffer conductive films are formed to be adjacent to the sidewalls of the first region and isolated from each other. A second insulating film is formed between the buffer conductive films to have a recess portion. A third insulating film is formed on an entire surface including the buffer conductive films.

Abstract: A high voltage device and a method for fabricating the same are disclosed, which improves voltage-resistant characteristics to protect against high voltage applied to a gate electrode. The high voltage device includes a semiconductor substrate having first, second and third regions, the first region having sidewalls at both sides, and the second and third regions having a height higher than that of the first region at both sides of the first region. A channel region is formed within a surface of the substrate belonging to the first region including some of the sidewalls. A first insulating film is formed on a surface of the first region including the sidewalls. Buffer conductive films are formed to be adjacent to the sidewalls of the first region and isolated from each other. A second insulating film is formed between the buffer conductive films to have a recess portion. A third insulating film is formed on an entire surface including the buffer conductive films.

Abstract: A nonvolatile memory device includes two metal layers, which act respectively as a floating gate and a control gate, and each of which has a downwardly extended portion. Thereby, a surface area per fixed unit cell area is increased, or alternatively a unit cell area per fixed surface area is reduced. Therefore, the nonvolatile memory device has enhanced programming and erasing properties and also improved reliability. Furthermore, a method for forming the nonvolatile memory device is provided with simplified processes.