Patents by Inventor Dae Heok Kwon

Dae Heok Kwon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8097540
    Abstract: A method of opening a pad in a semiconductor device. A protective film on a pad may be etched with a pad opening pattern as a mask. Dielectric heating may be performed on the pad opened by etching the protective film. Organic material containing C and F groups on the pad may be removed by heating with molecular vibration and/or microwaves, which may substantially prevent and/or minimize corrosion.
    Type: Grant
    Filed: December 9, 2008
    Date of Patent: January 17, 2012
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Dae-Heok Kwon
  • Publication number: 20090152687
    Abstract: A method of opening a pad in a semiconductor device. A protective film on a pad may be etched with a pad opening pattern as a mask. Dielectric heating may be performed on the pad opened by etching the protective film. Organic material containing C and F groups on the pad may be removed by heating with molecular vibration and/or microwaves, which may substantially prevent and/or minimize corrosion.
    Type: Application
    Filed: December 9, 2008
    Publication date: June 18, 2009
    Inventor: Dae-Heok Kwon
  • Patent number: 7468325
    Abstract: A method of cleaning a silicon nitride layer on a substrate is provided to effectively remove negative-charged impurities such as polymer and particle from the silicon nitride layer. In the method, the zeta potential of the silicon nitride layer is changed from positive to negative, and then the silicon nitride layer is cleaned with a first solution selected from an alkali solution and an NC-2 solution. So the negatively-charged impurities can be easily removed due to a repulsion force. The substrate can be treated with spin scrubber or quick dump rinse before and/or after the changing of the zeta potential. To change the zeta potential, the substrate can be dipped into a second solution such as an SC-1 solution, an NC-2 solution, and an alkali solution.
    Type: Grant
    Filed: December 29, 2005
    Date of Patent: December 23, 2008
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Dae Heok Kwon
  • Patent number: 7022601
    Abstract: A method of manufacturing a semiconductor device is disclosed wherein a WSiN layer is deposited in a contact hole as a barrier metal using an ALD process. A tungsten layer is deposited on the WSiN layer in the nucleation stage thereof. Then, using a CVD process, the contact hole is completely filled with a tungsten layer. The WSiN layer is continuously and uniformly deposited in the contact hole having high aspect ratio, and the tungsten layer in the nucleation stage can be continuously and uniformly deposited on the WSiN layer, thus completely filling the contact hole with a tungsten layer deposited by the CVD process.
    Type: Grant
    Filed: December 8, 2003
    Date of Patent: April 4, 2006
    Assignee: DongbuAnam Semiconductor Inc.
    Inventors: Byung Hyun Jung, Dae Heok Kwon
  • Patent number: 6916680
    Abstract: A method for fabricating an image sensor comprises forming an over coat layer on an upper face of a semiconductor substrate on which a color filter layer is formed, forming a microlens on the over coat layer; covering the microlens with a protection layer, back grinding a lower face of the semiconductor substrate, and removing the protection layer of the microlens. In this method, the protection layer is formed on the microlens of an image sensor and is subsequently removed after back grinding.
    Type: Grant
    Filed: November 25, 2003
    Date of Patent: July 12, 2005
    Assignee: DongbuAnam Semiconductor Inc.
    Inventors: Jae Suk Lee, Dae Heok Kwon
  • Publication number: 20040171181
    Abstract: A method for fabricating an image sensor comprises forming an over coat layer on an upper face of a semiconductor substrate on which a color filter layer is formed, forming a microlens on the over coat layer; covering the microlens with a protection layer, back grinding a lower face of the semiconductor substrate, and removing the protection layer of the microlens. In this method, the protection layer is formed on the microlens of an image sensor and is subsequently removed after back grinding.
    Type: Application
    Filed: November 25, 2003
    Publication date: September 2, 2004
    Applicant: Dongbu Electronics Co., Ltd.
    Inventors: Jae Suk Lee, Dae Heok Kwon
  • Publication number: 20040115913
    Abstract: A method of manufacturing a semiconductor device is disclosed wherein a WSiN layer is deposited in a contact hole as a barrier metal using an ALD process. A tungsten layer is deposited on the WSiN layer in the nucleation stage thereof. Then, using a CVD process, the contact hole is completely filled with a tungsten layer. The WSiN layer is continuously and uniformly deposited in the contact hole having high aspect ratio, and the tungsten layer in the nucleation stage can be continuously and uniformly deposited on the WSiN layer, thus completely filling the contact hole with a tungsten layer deposited by the CVD process.
    Type: Application
    Filed: December 8, 2003
    Publication date: June 17, 2004
    Applicant: Dongbu Electronics Co., Ltd.
    Inventors: Byung Hyun Jung, Dae Heok Kwon
  • Patent number: 6649488
    Abstract: After a trench is formed into a substrate, a polysilicon layer is formed on sidewalls and a bottom of the trench. A thermal oxidation is performed on the polysilicon layer such that a polysilicon oxide layer is formed thereon. Then, a portion of the polysilicon oxide layer is removed such that the polysilicon layer is exposed on the bottom of the trench while the sidewalls of the trench are still covered by the polysilicon oxide layer. A TEOS-ozone oxide layer is deposited on the substrate to fill the trench. Since the bottom of the trench has a better condition for the deposition of TEOS-ozone oxide layer than that of the sidewalls, a gap fill quality can be enhanced.
    Type: Grant
    Filed: November 27, 2002
    Date of Patent: November 18, 2003
    Assignee: Dongbu Electronics Co., Ltd.
    Inventors: Jae Suk Lee, Dae Heok Kwon
  • Publication number: 20030100168
    Abstract: After a trench is formed into a substrate, a polysilicon layer is formed on sidewalls and a bottom of the trench. A thermal oxidation is performed on the polysilicon layer such that a polysilicon oxide layer is formed thereon. Then, a portion of the polysilicon oxide layer is removed such that the polysilicon layer is exposed on the bottom of the trench while the sidewalls of the trench are still covered by the polysilicon oxide layer. A TEOS-ozone oxide layer is deposited on the substrate to fill the trench. Since the bottom of the trench has a better condition for the deposition of TEOS-ozone oxide layer than that of the sidewalls, a gap fill quality can be enhanced.
    Type: Application
    Filed: November 27, 2002
    Publication date: May 29, 2003
    Inventors: Jae Suk Lee, Dae Heok Kwon