Abstract: Disclosed are a method and apparatus for reusing wastewater. The method for reusing wastewater disclosed herein includes: generating a mixed wastewater by mixing multiple types of wastewater (S20); performing a first purification by passing the mixed wastewater through a flocculation-sedimentation unit (S40); performing a second purification by passing an effluent of the flocculation-sedimentation unit through a membrane bioreactor (MBR) (S60); performing a third purification by passing an effluent of the MBR through a reverse-osmosis membrane unit (S80); and reusing an effluent of the reverse-osmosis membrane unit as cooling water or industrial water (S100).

Abstract: A device for providing a location-based automatic participation chat room, the device, when a request to open a chat room is received along with service location information from at least one host terminal, creates at least one chat room, and sets a chat room identifier and a recognition code corresponding to each of the at least one chat room, and when at least one guest terminal accesses a location corresponding to the service location information using a pre-set participation means or the recognition code included in the participation means is received, makes the guest terminal participate in the chat room corresponding to the recognition code.

Abstract: A device for providing a location-based automatic participation chat room, the device, when a request to open a chat room is received along with service location information from at least one host terminal, creates at least one chat room, and sets a chat room identifier and a recognition code corresponding to each of the at least one chat room, and when at least one guest terminal accesses a location corresponding to the service location information using a pre-set participation means or the recognition code included in the participation means is received, makes the guest terminal participate in the chat room corresponding to the recognition code.

Abstract: A method of manufacturing a solar cell includes forming a buffer layer between an optical absorption layer and a window electrode layer. Forming the buffer layer includes depositing a metal material on the optical absorption layer, supplying a non-metal material on the optical absorption layer, supplying a gas material including oxygen atoms on the optical absorption layer, and reacting the metal material with the non-metal material. The gas material reacts with the metal material and the non-metal material to form a metal sulfur oxide on the optical absorption layer.

Abstract: Methods for manufacturing a solar cell are provided. The method may include forming a lower electrode on a substrate, forming a light absorption layer on the lower electrode, forming a buffer layer on the light absorption layer, and forming a window layer on the buffer layer. The window layer may include an intrinsic layer and the transparent electrode which have electric characteristics different from each other, respectively. The intrinsic layer and the transparent electrode may be formed by a sputtering process using a single target formed of metal oxide doped with impurities.

Abstract: Methods for manufacturing a solar cell are provided. The method may include forming a lower electrode on a substrate, forming a light absorption layer on the lower electrode, forming a buffer layer on the light absorption layer, and forming a window layer on the buffer layer. The window layer may include an intrinsic layer and the transparent electrode which have electric characteristics different from each other, respectively. The intrinsic layer and the transparent electrode may be formed by a sputtering process using a single target formed of metal oxide doped with impurities.

Abstract: Provided is a bifacial solar cell. The bifacial solar cell includes: a transparent substrate having a first side and a second side facing each other; a first transparent electrode disposed on the first side of the transparent substrate; a first light absorbing layer disposed on the first transparent electrode and exposing the first transparent electrode at one edge; a second transparent electrode disposed on the first light absorbing layer; a first metal electrode pad disposed on the exposed first transparent electrode; a third transparent electrode disposed below the second side of the transparent substrate; a second light absorbing layer disposed below the third transparent electrode and exposing the third transparent electrode in correspondence to the exposed first transparent electrode; a fourth transparent electrode disposed below the second light absorbing layer; and a second metal electrode pad disposed below the exposed third transparent electrode.

Abstract: Provided is a compound semiconductor solar cell. The compound semiconductor solar cell includes: an impurity diffusion preventing layer disposed on a substrate, added with an alkali component, and formed of a metal layer of one of Cr, Co, or Cu; a rear electrode disposed on the impurity diffusion preventing layer and formed of Mo; a CIGS based light absorbing layer disposed on the rear electrode; and a front transparent electrode disposed on the light absorbing layer.

Abstract: Provided are a CIGS solar cell and a method of fabricating the CIGS solar cell. In the method, a buffer layer exposing protrusions is formed. Then, a window electrode layer having an uneven surface conforming with the protrusions of the buffer layer is formed. Thus, an additional process for making the upper surface of a window electrode layer rough is unnecessary in order to decrease surface reflectance of incident sunlight and increase the solar cell efficiency, so that productivity can be improved.

Abstract: A solar cell and method of fabricating the same are provided. The solar cell includes a metal electrode layer, an optical absorption layer, a buffer layer, and a transparent electrode layer. The metal electrode layer is disposed on a substrate. The optical absorption layer is disposed on the metal electrode layer. The buffer layer is disposed on the optical absorption layer and includes an indium gallium nitride (InxGa1-xN). The transparent electrode layer is disposed on the buffer layer.

Abstract: A yield of a semiconductor layout may be improved by selecting a pattern that does not satisfy at least one of multiple rules within the layout, adding a margin to a predetermined value of the at least one of the rules associated with selected pattern, based on a ground rule and a recommended rule of each of the rules, calculating an overall fail rate of at least one of the rules that varies according to the addition of the margin, and determining an adjusted margin to be added based on the calculated overall fail rate.

Abstract: Disclosed herein is a wireless universal serial bus (USB) dual role device (DRD) system in which a common part shared between a wireless USB host and a wireless USB device is extracted from a central processing unit (CPU) to implement a wireless USB DRD, and driven to be divisionally processed in the CPU according to roles to reduce system load, so that a DRD performance can be improved.

Abstract: A yield of a semiconductor layout may be improved by selecting a pattern that does not satisfy at least one of multiple rules within the layout, adding a margin to a predetermined value of the at least one of the rules associated with selected pattern, based on a ground rule and a recommended rule of each of the rules, calculating an overall fail rate of at least one of the rules that varies according to the addition of the margin, and determining an adjusted margin to be added based on the calculated overall fail rate.

Abstract: Disclosed is a semiconductor device capable of protecting an internal circuit from an ESD impact, damage and a mistaken working caused by an electrostatic discharge, a surge pulse and a noise, and more particularly to a semiconductor device capable of protecting an internal circuit from an external abnormal input without a protection circuit. The semiconductor device includes a varistor coupled to a conductor for discharging an abnormal input signal input to a ground voltage level. The varistor acts as a conductor when an input signal is an abnormal input signal and acts as an insulator when the input signal is a normal input signal. The use of the varistor may provide an improved ESD protection circuit and then promote the reliability of the semiconductor device.