Patents by Inventor Dae Ik Kim

Dae Ik Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130256793
    Abstract: A semiconductor device capable of reducing a thickness, an electronic product employing the same, and a method of fabricating the same are provided. The method of fabricating a semiconductor device includes preparing a semiconductor substrate having first and second active regions. A first transistor in the first active region includes a first gate pattern and first impurity regions. A second transistor the second active region includes a second gate pattern and second impurity regions. A first conductive pattern is on the first transistor, wherein at least a part of the first conductive pattern is disposed at a same distance from an upper surface of the semiconductor substrate as at least a part of the second gate pattern. The first conductive pattern may be formed on the first transistor while the second transistor is formed.
    Type: Application
    Filed: May 23, 2013
    Publication date: October 3, 2013
    Inventors: Dae-Ik KIM, Yong-IL KIM
  • Publication number: 20130242909
    Abstract: Disclosed are a radio resource allocation method and an apparatus for performing the same. The radio resource allocation method includes receiving channel quality information from a UE, and allocating radio resources on the basis of the received channel quality information and a characteristic of at least one service to be provided to the UE. Accordingly, the radio resource allocation method can assure QoS, and enhance resource-use efficiency.
    Type: Application
    Filed: March 15, 2013
    Publication date: September 19, 2013
    Applicant: Electronics and Telecommunications Research Institute
    Inventor: Dae Ik KIM
  • Patent number: 8507980
    Abstract: A semiconductor device has a bit line interconnection with a greater width and a reduced level on a bit line contact is provided, as are methods of fabricating such devices. These method includes forming a buried gate electrode to intersect an active region of a substrate. Source and drain regions are formed in the active region. A first conductive pattern is formed on the substrate. The first conductive pattern has a first conductive layer hole configured to expose the drain region. A second conductive pattern is formed in the first conductive layer hole to contact the drain region. A top surface of the second conductive pattern is at a lower level than a top surface of the first conductive pattern. A third conductive layer and a bit line capping layer are formed on the first conductive pattern and the second conductive pattern and patterned to form a third conductive pattern and a bit line capping pattern.
    Type: Grant
    Filed: August 1, 2011
    Date of Patent: August 13, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Dae-Ik Kim
  • Patent number: 8509183
    Abstract: According to an Evolved Multimedia Broadcast Multicast Service (E-MBMS) service method of the present invention, an E-MBMS service is received from a first base station. If neighbor cell MBMS control information is modified in the first base station, MBMS paging information, including a factor informing that the neighbor cell MBMS control information has been modified, is received from the first base station. When an MBMS control information update cycle is reached, modified neighbor cell MBMS control information is received from the first base station and is stored. When a user equipment moves from the first base station to a second base station, a P-T-M radio bearer is reset based on the stored neighbor cell MBMS control information and receiving the E-MBMS service from the second base station. Accordingly, the consumption of battery power can be reduced, and an E-MBMS service being services is not interrupted although a user equipment moves.
    Type: Grant
    Filed: November 16, 2009
    Date of Patent: August 13, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Dae Ik Kim, Jee Hyeon Na, Sang Ho Lee
  • Patent number: 8497174
    Abstract: A method of fabricating a semiconductor device including a vertical channel transistor. The method may include: forming a plurality of first device isolation layers in a substrate as a pattern of lines having a first depth from an upper surface of a substrate, to define a plurality of active regions, forming a plurality of trenches having a second depth smaller than the first depth, etching portions of the substrate that are under some of the plurality of trenches that are selected at a predetermined interval, to form a plurality of device isolation trenches having a third depth that is greater than the second depth, forming second device isolation layers that include an insulating material, in lower portions of the plurality of device isolation trenches, and forming buried bit lines in lower portions of the plurality of trenches and the plurality of device isolation trenches.
    Type: Grant
    Filed: September 22, 2011
    Date of Patent: July 30, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-seung Cho, Dae-ik Kim, Yoo-sang Hwang, Hyun-woo Chung
  • Patent number: 8450786
    Abstract: A semiconductor device capable of reducing a thickness, an electronic product employing the same, and a method of fabricating the same are provided. The method of fabricating a semiconductor device includes preparing a semiconductor substrate having first and second active regions. A first transistor in the first active region includes a first gate pattern and first impurity regions. A second transistor the second active region includes a second gate pattern and second impurity regions. A first conductive pattern is on the first transistor, wherein at least a part of the first conductive pattern is disposed at a same distance from an upper surface of the semiconductor substrate as at least a part of the second gate pattern. The first conductive pattern may be formed on the first transistor while the second transistor is formed.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: May 28, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dae-Ik Kim, Yong-Il Kim
  • Patent number: 8420485
    Abstract: A semiconductor device and method of manufacturing the same. The method includes: defining a first active area and a second active area on a substrate, the first and second active areas being in a line form, forming a first main trench and a second main trench on the substrate, forming a first sub-trench and a second sub-trench in bottoms of the first and second main trenches, respectively, forming a buried insulation layer filling the first and second sub-trenches, partially exposing the substrate at an area where the first active area crosses with the first sub-trench and an area where the second active area crosses with the second sub-trench and forming the first buried bit line and the second buried bit line on the buried insulation layer, and the first and second buried bit lines being extended in parallel to each other.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: April 16, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-seung Cho, Dae-ik Kim, Yoo-sang Hwang, Hyun-woo Chung
  • Patent number: 8362536
    Abstract: A semiconductor memory device includes a first pair of pillars extending from a substrate to form vertical channel regions, the first pair of pillars having a first pillar and a second pillar adjacent to each other, the first pillar and the second pillar arranged in a first direction, a first bit line disposed on a bottom surface of a first trench formed between the first pair of pillars, the first bit line extending in a second direction that is substantially perpendicular to the first direction, a first contact gate disposed on a first surface of the first pillar with a first gate insulating layer therebetween, a second contact gate disposed on a first surface of the second pillar with a second gate insulating layer therebetween, the first surface of the first pillar and the first surface of the second pillar face opposite directions, and a first word line disposed on the first contact gate and a second word line disposed on the second contact gate, the word lines extending in the first direction.
    Type: Grant
    Filed: October 14, 2010
    Date of Patent: January 29, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyung-woo Chung, Yong-chul Oh, Yoo-sang Hwang, Gyo-young Jin, Hyeong-sun Hong, Dae-ik Kim
  • Patent number: 8343845
    Abstract: A capacitor structure includes a plurality of lower electrodes on a substrate, the lower electrodes having planar top surfaces and being arranged in a first direction to define a lower electrode column, a plurality of lower electrode columns being arranged in a second direction perpendicular to the first direction to define a lower electrode matrix, a plurality of supports on upper sidewalls of at least two adjacent lower electrodes, a dielectric layer on the lower electrodes and the supports, and an upper electrode on the dielectric layer.
    Type: Grant
    Filed: March 19, 2010
    Date of Patent: January 1, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong-Il Kim, Dae-Ik Kim, Yun-Sung Lee, Nam-Jung Kang
  • Patent number: 8344517
    Abstract: An integrated circuit device includes first and second conductive structures spaced apart from one another on a substrate along a first direction. The first and second conductive structures extend in a second direction substantially perpendicular to the first direction. A contact plug is interposed between the first and second conductive structures and is separated therefrom along the first direction by respective air gaps on opposite sides of the contact plug. The air gaps define first and second air spacers that electrically insulate the contact plug from the first and second conductive structures, respectively. An upper insulation layer covers the first and second air spacers and the first and second conductive structures. The air spacers may sufficiently reduce the loading capacitance between the conductive structures. Related fabrication methods are also discussed.
    Type: Grant
    Filed: May 11, 2012
    Date of Patent: January 1, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dae-Ik Kim, Je-Min Park, Chang-Suk Hyun
  • Patent number: 8309460
    Abstract: Provided are methods of manufacturing semiconductor devices by which two different kinds of contact holes with different sizes are formed using one photolithography process. The methods include preparing a semiconductor substrate in which an active region is titled in a diagonal direction. A hard mask is formed on the entire surface of the semiconductor substrate. A mask hole is patterned not to overlap a word line. A first oxide layer is deposited on the hard mask, and the hard mask is removed to form a piston-shaped sacrificial pattern. A first polysilicon (poly-Si) layer is deposited on the sacrificial pattern and patterned to form a cylindrical first sacrificial mask surrounding the piston-shaped sacrificial pattern. A second oxide layer is coated on the first sacrificial mask to such an extent as to form voids. A second poly-Si layer is deposited in the voids and patterned to form a pillar-shaped second sacrificial mask. The second oxide layer is removed to expose the active region.
    Type: Grant
    Filed: May 14, 2010
    Date of Patent: November 13, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dae-Ik Kim, Ho-Jun Yi
  • Publication number: 20120217631
    Abstract: An integrated circuit device includes first and second conductive structures spaced apart from one another on a substrate along a first direction. The first and second conductive structures extend in a second direction substantially perpendicular to the first direction. A contact plug is interposed between the first and second conductive structures and is separated therefrom along the first direction by respective air gaps on opposite sides of the contact plug. The air gaps define first and second air spacers that electrically insulate the contact plug from the first and second conductive structures, respectively. An upper insulation layer covers the first and second air spacers and the first and second conductive structures. The air spacers may sufficiently reduce the loading capacitance between the conductive structures. Related fabrication methods are also discussed.
    Type: Application
    Filed: May 11, 2012
    Publication date: August 30, 2012
    Inventors: Dae-Ik Kim, Je-Min Park, Chang-Suk Hyun
  • Publication number: 20120163274
    Abstract: Disclosed are a system and a method for receiving an MBMS broadcasting service. In the present invention, in a mobile communication/wireless communication system, an MBMS service is provided by synchronizing a unicast bearer with a multicast bearer through scheduling information mapping at the time of transmitting a broadcast/multicast service through a unicast. Further, the present invention presents even a method for improving quality of experience (QoE) of the service by providing the MBMS service through the multicast bearer and the unicast bearer simultaneously. According to the present invention, MBMS services of various service qualities can be provided depending on wireless quality of a terminal or the capability of the terminal at the time of providing the MBMS service.
    Type: Application
    Filed: December 22, 2011
    Publication date: June 28, 2012
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Mi Young YUN, Jung Mo MOON, Sang Ho LEE, Eun Hee HYUN, Jai Hyung CHO, Jee Hyeon NA, Chul PARK, Sun Hwa LIM, Hyun Suk ROH, Dae Ik KIM, Jae Ho KIM, Yeong Jin KIM, Dae Sik KIM
  • Publication number: 20120163273
    Abstract: Disclosed is a method for receiving MBMS services from a base station supporting multi-carriers, including: receiving first system information including information on all the carriers; receiving second system information including information on multi-carriers supported by the base station; receiving MBMS control information through an MBMS control channel; and receiving the MBMS services through an MBMS transmission channel based on the MBMS control information.
    Type: Application
    Filed: December 22, 2011
    Publication date: June 28, 2012
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Jee Hyeon NA, Dae Ik KIM, Chul PARK, Sang Ho LEE
  • Publication number: 20120155364
    Abstract: A method and apparatus for multimedia broadcast and multicast service (MBMS) counting is provided. A user equipment (UE) may transmit selected service information to a multi-cell and multicast coordination entity (MCE) through a target evolved node base station (eNB), every time that a service requiring counting is received or cancelled and thus, the MCE may accurately manage a number of UEs that receive a service for each eNB. Also, the use may transmit selected service information to the MCE through the target eNB every time that the UE enters a new cell and thus, the MCE may accurately manage a number of UEs that receive a service for each eNB.
    Type: Application
    Filed: December 19, 2011
    Publication date: June 21, 2012
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Dae Ik KIM, Jee Hyeon NA, Jung Mo MOON, Sang Ho LEE
  • Patent number: 8198189
    Abstract: An integrated circuit device includes first and second conductive structures spaced apart from one another on a substrate along a first direction. The first and second conductive structures extend in a second direction substantially perpendicular to the first direction. A contact plug is interposed between the first and second conductive structures and is separated therefrom along the first direction by respective air gaps on opposite sides of the contact plug. The air gaps define first and second air spacers that electrically insulate the contact plug from the first and second conductive structures, respectively. An upper insulation layer covers the first and second air spacers and the first and second conductive structures. The air spacers may sufficiently reduce the loading capacitance between the conductive structures. Related fabrication methods are also discussed.
    Type: Grant
    Filed: May 11, 2010
    Date of Patent: June 12, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dae-Ik Kim, Je-Min Park, Chang-Suk Hyun
  • Publication number: 20120119286
    Abstract: A semiconductor device has a plurality of vertical channels extending upright on a substrate, a plurality of bit lines extending among the vertical channels, a plurality of word lines which include a plurality of gates disposed adjacent first sides of the vertical channels, respectively, and a plurality of conductive elements disposed adjacent second sides of the vertical channels opposite the first sides. The conductive elements can provide a path to the substrate for charge carriers which have accumulated in the associated vertical channel to thereby mitigate a so-called floating effect.
    Type: Application
    Filed: October 31, 2011
    Publication date: May 17, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dae-Ik Kim, Hyeong-Sun Hong, Yoo-Sang Hwang, Hyun-Woo Chung
  • Publication number: 20120099504
    Abstract: Disclosed is a system for providing an Evolved Multimedia Broadcast/Multicast Service (EMBMS) chatting service for providing a multi-chatting service. The system comprises at least one of a User Equipment (UE) to request establishment of a chatting channel and to transmit and receive a communication message and contents so as to transmit and receive the communication message with a plurality of mobile subscribers participated in the chatting channel, an evolved Broadcast Multicast-Service Center (eBM-SC) to perform control of an EMBMS service so as to transmit the communication message to the at least one of the UE using the EMBMS service, and a service provider server to transmit, to the eBM-SC, user service information, first bearer service information, and contents for each of the chatting channels, so that the UE transmits and receives the communication message with the plurality of the mobile subscribers participated in the chatting channel.
    Type: Application
    Filed: September 23, 2011
    Publication date: April 26, 2012
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Eun Hee HYUN, Hochoong CHO, Jung Mo MOON, Dae Ik KIM, Mi Young YUN, Sang Ho LEE
  • Publication number: 20120094454
    Abstract: A method of fabricating a semiconductor device including a vertical channel transistor. The method may include: forming a plurality of first device isolation layers in a substrate as a pattern of lines having a first depth from an upper surface of a substrate, to define a plurality of active regions, forming a plurality of trenches having a second depth smaller than the first depth, etching portions of the substrate that are under some of the plurality of trenches that are selected at a predetermined interval, to form a plurality of device isolation trenches having a third depth that is greater than the second depth, forming second device isolation layers that include an insulating material, in lower portions of the plurality of device isolation trenches, and forming buried bit lines in lower portions of the plurality of trenches and the plurality of device isolation trenches.
    Type: Application
    Filed: September 22, 2011
    Publication date: April 19, 2012
    Inventors: Young-seung Cho, Dae-ik Kim, Yoo-sang Hwang, Hyun-woo Chung
  • Publication number: 20120094455
    Abstract: A semiconductor device and method of manufacturing the same. The method includes: defining a first active area and a second active area on a substrate, the first and second active areas being in a line form, forming a first main trench and a second main trench on the substrate, forming a first sub-trench and a second sub-trench in bottoms of the first and second main trenches, respectively, forming a buried insulation layer filling the first and second sub-trenches, partially exposing the substrate at an area where the first active area crosses with the first sub-trench and an area where the second active area crosses with the second sub-trench and forming the first buried bit line and the second buried bit line on the buried insulation layer, and the first and second buried bit lines being extended in parallel to each other.
    Type: Application
    Filed: September 23, 2011
    Publication date: April 19, 2012
    Inventors: Young-seung CHO, Dae-ik Kim, Yoo-sang Hwang, Hyun-woo Chung