Abstract: A pulse width modulation apparatus having a storage circuit for temporarily storing pulse width data inputted over a data bus and then inverting it, the pulse width data determining a pulse width, a counting circuit for counting a clock signal in response to an external pulse width modulation enable signal and an external reset signal, a comparison circuit for comparing the number of logical 0 bits of the inverted pulse width data from the storage circuit with the number of logical 1 bits of count data from the counting circuit and outputting a high signal when the number of the logical 0 bits of the inverted pulse width data is greater than or equal to the number of the logical 1 bits of the count data and a low signal when the number of the logical 0 bits of the inverted pulse width data is smaller than the number of the logical 1 bits of the count data, and an output circuit for latching an output signal from the comparison circuit to output a pulse width modulation signal.

Abstract: A method and a device are provided for protecting data stored in a ROM of a micoprogram control unit. Such data may take the form of a user program. To protect the data, predetermined code data is written into a predetermined address in the ROM. A code address inputted from outside the microprogram control unit is then compared with the predetermined address. If the inputted code address is determined to match the predetermined address, then code data inputted from outside the microprogram control unit is compared with the predetermined code data. Only after both of these comparisons are successfully made is the data in the ROM allowed to be read outside the microprogram control unit.

Abstract: A test device of an A/D converter contained in a one-chip microcomputer capable of testing all failures in a digital part of the A/D converter by testing the digital part at a function test step carried out by the microcomputer. The test device comprises an A/D test load register for storing a digital value corresponding to an analog value to be tested. In an A/D self-test mode, data from the A/D test load register is stored in an A/D data register via a control logic, upon setting of an A/D start flag. Storing of the data is achieved, in place of an output from a comparator based on an analog input signal. As the data is read, it is possible to test analog and digital parts of the A/D converter individually, at a function test step, thereby verifying all failures in the A/D converter.