Patents by Inventor Dae Yong Shim
Dae Yong Shim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240128173Abstract: A semiconductor package includes a first package substrate having a first region and a second region, which do not overlap each other, a first connection element having a first height on the first region, a first semiconductor chip having a second height connected to the first connection element, a second connection element having a third height on the second region, a third connection element having a fourth height on the second connection element and electrically connected to the second connection element, a second package on the third connection element, the second package including a second package substrate and a second semiconductor chip, and a first mold layer covering at least a portion of the first semiconductor chip, covering at least a portion of the second connection element, covering the first package substrate, exposing upper surfaces of the first semiconductor chip and the second connection element, and having a fifth height.Type: ApplicationFiled: May 19, 2023Publication date: April 18, 2024Inventors: Ji-Yong Park, Jong Bo Shim, Dae Hun Lee, Choong Bin Yim
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Publication number: 20240098048Abstract: A method for displaying a message in a messenger service by a user terminal is proposed. The method may include receiving the message from a server. The method may also include receiving a mask command for the message from the server when text information extracted from the message satisfies a preset condition. The method may further include displaying a mask message corresponding to the message in a chat room of the messenger service based on the mask command.Type: ApplicationFiled: September 8, 2023Publication date: March 21, 2024Inventors: Dae Won YOON, Ki Yong SHIM, Eun Jung KO, Doo Won LEE, Ji Sun LEE
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Patent number: 10612981Abstract: A semiconductor device includes a control voltage generator to generate a control voltage according to a temperature section signal; and a temperature voltage output block to output a temperature voltage varying with a temperature according to the control voltage and the temperature section signal.Type: GrantFiled: December 19, 2018Date of Patent: April 7, 2020Assignees: SK hynix Inc., Seoul National University R&DB FoundationInventors: Jae-Hoon Kim, Dae-Yong Shim, Suhwan Kim
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Patent number: 10580480Abstract: A semiconductor memory apparatus includes a driving voltage providing circuit suitable for selectively providing a first driving voltage, a second driving voltage, a third driving voltage, a ground voltage, and a precharge voltage to a first driving line and a second driving line in response to an active signal, a cell characteristic information signal, and a precharge signal. The semiconductor memory apparatus also includes a sense amplifier suitable for operating by being applied with voltages provided from the first and second driving lines.Type: GrantFiled: June 14, 2019Date of Patent: March 3, 2020Assignee: SK hynix Inc.Inventors: Jung Hwan Lee, Dae Yong Shim, Kang Seol Lee
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Publication number: 20190295625Abstract: A semiconductor memory apparatus includes a driving voltage providing circuit suitable for selectively providing a first driving voltage, a second driving voltage, a third driving voltage, a ground voltage, and a precharge voltage to a first driving line and a second driving line in response to an active signal, a cell characteristic information signal, and a precharge signal. The semiconductor memory apparatus also includes a sense amplifier suitable for operating by being applied with voltages provided from the first and second driving lines.Type: ApplicationFiled: June 14, 2019Publication date: September 26, 2019Applicant: SK hynix Inc.Inventors: Jung Hwan LEE, Dae Yong SHIM, Kang Seol LEE
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Patent number: 10388401Abstract: A semiconductor system may be provided. The semiconductor system may include a first semiconductor device configured for outputting a command and an address, and inputting/outputting data. The semiconductor system may include a second semiconductor device including first and second registers, wherein first corrected data, which is generated by correcting an error of internal data outputted in a first error correction operation, may be stored in the first register, and second corrected data, which is generated by correcting an error of the internal data outputted in a second error correction operation, may be stored in the second register, based on the command and the address.Type: GrantFiled: April 6, 2017Date of Patent: August 20, 2019Assignee: SK hynix Inc.Inventors: Min Seok Choi, Dae Yong Shim
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Patent number: 10332585Abstract: A semiconductor memory apparatus includes a driving voltage providing circuit suitable for selectively providing a first driving voltage, a second driving voltage, a third driving voltage, a ground voltage, and a precharge voltage to a first driving line and a second driving line in response to an active signal, a cell characteristic information signal, and a precharge signal. The semiconductor memory apparatus also includes a sense amplifier suitable for operating by being applied with voltages provided from the first and second driving lines.Type: GrantFiled: August 24, 2017Date of Patent: June 25, 2019Assignee: SK hynix, Inc.Inventors: Jung Hwan Lee, Dae Yong Shim, Kang Seol Lee
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Patent number: 10290333Abstract: A semiconductor device includes an internal operation control circuit suitable for generating a set period signal which is enabled for a set period, in response to a write command and an internal operation control signal, and generating a column select signal, an output control signal and an input control signal in response to the set period signal; and an internal operation circuit suitable for performing an internal operation of converting parity data generated from input data and storing the converted parity data in a memory cell array, in response to the column select signal, the output control signal and the input control signal.Type: GrantFiled: June 2, 2017Date of Patent: May 14, 2019Assignee: SK hynix Inc.Inventors: Seol Hee Lee, Chang Hyun Kim, Dae Yong Shim, Kang Seol Lee
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Publication number: 20190128745Abstract: A semiconductor device includes a control voltage generator to generate a control voltage according to a temperature section signal; and a temperature voltage output block to output a temperature voltage varying with a temperature according to the control voltage and the temperature section signal.Type: ApplicationFiled: December 19, 2018Publication date: May 2, 2019Inventors: Jae-Hoon KIM, Dae-Yong SHIM, Suhwan KIM
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Patent number: 10197453Abstract: A semiconductor device includes a first signal generator configured to generate a plurality of first signals and a second signal generator configured to generate a plurality of second signals. One of the plurality of first signals varies in one of a plurality of temperature sections. One of the plurality of second signals is substantially constant in one of the plurality of temperature sections.Type: GrantFiled: March 22, 2017Date of Patent: February 5, 2019Assignees: SK HYNIX INC., SEOUL NATIONAL UNIVERSITY R&DB FOUNDATIONInventors: Jae-Hoon Kim, Dae-Yong Shim, Suhwan Kim
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Publication number: 20180182447Abstract: A semiconductor memory apparatus includes a driving voltage providing circuit suitable for selectively providing a first driving voltage, a second driving voltage, a third driving voltage, a ground voltage, and a precharge voltage to a first driving line and a second driving line in response to an active signal, a cell characteristic information signal, and a precharge signal. The semiconductor memory apparatus also includes a sense amplifier suitable for operating by being applied with voltages provided from the first and second driving lines.Type: ApplicationFiled: August 24, 2017Publication date: June 28, 2018Applicant: SK hynix Inc.Inventors: Jung Hwan LEE, Dae Yong SHIM, Kang Seol LEE
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Publication number: 20180074895Abstract: A semiconductor system may be provided. The semiconductor system may include a first semiconductor device configured for outputting a command and an address, and inputting/outputting data. The semiconductor system may include a second semiconductor device including first and second registers, wherein first corrected data, which is generated by correcting an error of internal data outputted in a first error correction operation, may be stored in the first register, and second corrected data, which is generated by correcting an error of the internal data outputted in a second error correction operation, may be stored in the second register, based on the command and the address.Type: ApplicationFiled: April 6, 2017Publication date: March 15, 2018Applicant: SK hynix Inc.Inventors: Min Seok CHOI, Dae Yong SHIM
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Publication number: 20180068698Abstract: A semiconductor device includes an internal operation control circuit suitable for generating a set period signal which is enabled for a set period, in response to a write command and an internal operation control signal, and generating a column select signal, an output control signal and an input control signal in response to the set period signal; and an internal operation circuit suitable for performing an internal operation of converting parity data generated from input data and storing the converted parity data in a memory cell array, in response to the column select signal, the output control signal and the input control signal.Type: ApplicationFiled: June 2, 2017Publication date: March 8, 2018Applicant: SK hynix Inc.Inventors: Seol Hee LEE, Chang Hyun KIM, Dae Yong SHIM, Kang Seol LEE
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Publication number: 20170191878Abstract: A semiconductor device includes a first signal generator configured to generate a plurality of first signals and a second signal generator configured to generate a plurality of second signals. One of the plurality of first signals varies in one of a plurality of temperature sections. One of the plurality of second signals is substantially constant in one of the plurality of temperature sections.Type: ApplicationFiled: March 22, 2017Publication date: July 6, 2017Inventors: Jae-Hoon KIM, Dae-Yong SHIM, Suhwan KIM
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Patent number: 9645015Abstract: A semiconductor device includes a control voltage generator to generate a control voltage according to a temperature section signal; and a temperature voltage output block to output a temperature voltage varying with a temperature according to the control voltage and the temperature section signal.Type: GrantFiled: October 17, 2013Date of Patent: May 9, 2017Assignees: SK HYNIX INC., SEOUL NATIONAL UNIVERSITY R&DB FOUNDATIONInventors: Jae-Hoon Kim, Dae-Yong Shim, Suhwan Kim
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Publication number: 20140146852Abstract: A semiconductor device includes a control voltage generator to generate a control voltage according to a temperature section signal; and a temperature voltage output block to output a temperature voltage varying with a temperature according to the control voltage and the temperature section signal.Type: ApplicationFiled: October 17, 2013Publication date: May 29, 2014Applicants: Seoul National University R&DB Foundation, SK Hynix Inc.Inventors: Jae-Hoon KIM, Dae-Yong SHIM, Suhwan KIM
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Patent number: 6066523Abstract: The present invention relates to a method for fabricating semiconductor devices having triple wells, the present invention has an effect as follows. The present invention provides carrying out N-well and P-well and R-well ion implantation using a mask for implanting two wells after forming an element isolation oxide film, defining an accurate well region by forming wells having an accurate profile due to activating impurity ions in accordance with the thermal process, and improving the punch characteristic between a well and a well.Type: GrantFiled: June 26, 1998Date of Patent: May 23, 2000Assignee: Hyundai Electronics Industries Co., Ltd.Inventors: Dae Yong Shim, Byeong Ryeol Lee