Patents by Inventor Daekyun Jeong

Daekyun Jeong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9633930
    Abstract: The present invention herein relates to a method of forming a through-hole in a silicon substrate. The present invention herein also relates to a method of forming an electrical connection element which penetrates through the silicon substrate, and to a semiconductor device manufactured thereby. More particularly, the present invention herein relates to a method of forming in a silicon substrate a through-hole capable of reducing roughness in a side wall of the through-hole and exhibiting low permittivity, by alternatingly laminating cationic and anionic polymer on the through-hole that has a dent on the side wall to form a porous elastic layer, and also relates to a method of forming an electrical connection that penetrates through the silicon substrate, and to a semiconductor device manufactured thereby.
    Type: Grant
    Filed: November 26, 2015
    Date of Patent: April 25, 2017
    Assignee: Kookmin University Industry Academy Cooperation Foundation
    Inventors: Jaegab Lee, Daekyun Jeong
  • Publication number: 20160148858
    Abstract: The present invention herein relates to a method of forming a through-hole in a silicon substrate. The present invention herein also relates to a method of forming an electrical connection element which penetrates through the silicon substrate, and to a semiconductor device manufactured thereby. More particularly, the present invention herein relates to a method of forming in a silicon substrate a through-hole capable of reducing roughness in a side wall of the through-hole and exhibiting low permittivity, by alternatingly laminating cationic and anionic polymer on the through-hole that has a dent on the side wall to form a porous elastic layer, and also relates to a method of forming an electrical connection that penetrates through the silicon substrate, and to a semiconductor device manufactured thereby.
    Type: Application
    Filed: November 26, 2015
    Publication date: May 26, 2016
    Inventors: Jaegab LEE, Daekyun JEONG
  • Patent number: 8415259
    Abstract: A method of forming a film on a semiconductor substrate by plasma enhanced atomic layer deposition (PEALD), includes: introducing a nitrogen- and hydrogen-containing reactive gas and a rare gas into a reaction space inside which the semiconductor substrate is placed; introducing a precursor in pulses of less than 1.0-second duration into the reaction space wherein the reactive gas and the rare gas are introduced; exiting a plasma in pulses of less than 1.0-second duration immediately after the precursor is shut off; and maintaining the reactive gas and the rare gas as a purge of less than 2.0-second duration.
    Type: Grant
    Filed: March 2, 2012
    Date of Patent: April 9, 2013
    Assignee: ASM Japan K.K.
    Inventors: Woo Jin Lee, Kuo-Wei Hong, Akira Shimizu, Daekyun Jeong
  • Patent number: 8133555
    Abstract: A method of forming a single-metal film on a substrate by plasma ALD includes: contacting a surface of a substrate with a ?-diketone metal complex in a gas phase; exposing molecule-attached surface to a nitrogen-hydrogen mixed plasma; and repeating the above steps, thereby accumulating atomic layers to form a single-metal film on the substrate.
    Type: Grant
    Filed: October 14, 2008
    Date of Patent: March 13, 2012
    Assignee: ASM Japan K.K.
    Inventors: Hiroshi Shinriki, Kunitoshi Namba, Daekyun Jeong
  • Patent number: 8084104
    Abstract: A metal film composed of multiple atomic layers continuously formed by atomic layer deposition of Ru and Ta or Ti includes at least a top section and a bottom section, wherein an atomic composition of Ru, Ta or Ti, and N varies in a thickness direction of the metal film. The atomic composition of Ru, Ta or Ti, and N in the top section is represented as Ru(x1)Ta/Ti(y1)N(z1) wherein an atomic ratio of Ru(x1)/(Ta/Ti(y1)) is no less than 15, and z1 is 0.05 or less. The atomic composition of Ru, Ta or Ti, and N in the bottom section is represented as Ru(x2)Ta/Ti(y2)N(z2) wherein an atomic ratio of Ru(x2)/(Ta/Ti(y2)) is more than zero but less than 15, and z2 is 0.10 or greater.
    Type: Grant
    Filed: August 29, 2008
    Date of Patent: December 27, 2011
    Assignee: ASM Japan K.K.
    Inventors: Hiroshi Shinriki, Kunitoshi Namba, Daekyun Jeong
  • Publication number: 20100092696
    Abstract: A method of forming a single-metal film on a substrate by plasma ALD includes: contacting a surface of a substrate with a ?-diketone metal complex in a gas phase; exposing molecule-attached surface to a nitrogen-hydrogen mixed plasma; and repeating the above steps, thereby accumulating atomic layers to form a single-metal film on the substrate.
    Type: Application
    Filed: October 14, 2008
    Publication date: April 15, 2010
    Applicant: ASM JAPAN K.K.
    Inventors: Hiroshi Shinriki, Kunitoshi Namba, Daekyun Jeong
  • Publication number: 20100055433
    Abstract: A metal film composed of multiple atomic layers continuously formed by atomic layer deposition of Ru and Ta or Ti includes at least a top section and a bottom section, wherein an atomic composition of Ru, Ta or Ti, and N varies in a thickness direction of the metal film. The atomic composition of Ru, Ta or Ti, and N in the top section is represented as Ru(x1)Ta/Ti(y1)N(z1) wherein an atomic ratio of Ru(x1)/(Ta/Ti(y1)) is no less than 15, and z1 is 0.05 or less. The atomic composition of Ru, Ta or Ti, and N in the bottom section is represented as Ru(x2)Ta/Ti(y2)N(z2) wherein an atomic ratio of Ru(x2)/(Ta/Ti(y2)) is more than zero but less than 15, and z2 is 0.10 or greater.
    Type: Application
    Filed: August 29, 2008
    Publication date: March 4, 2010
    Applicant: ASM JAPAN K.K.
    Inventors: Hiroshi Shinriki, Kunitoshi Namba, Daekyun Jeong
  • Patent number: 7655564
    Abstract: A method of forming a Ta—Ru metal liner layer for Cu wiring includes: (i) conducting atomic deposition of Ta X times, each atomic deposition of Ta being accomplished by a pulse of hydrogen plasma, wherein X is an integer such that a surface of an underlying layer is not covered with Ta particles; (ii) after step (i), conducting atomic deposition of Ru Y times, each atomic deposition of Ru being accomplished by a pulse of hydrogen plasma, wherein Y is an integer such that the Ta particles are not covered with Ru particles; and (iii) repeating steps (i) and (ii) Z times, thereby forming a Ta—Ru metal liner layer on a Cu wiring substrate.
    Type: Grant
    Filed: December 12, 2007
    Date of Patent: February 2, 2010
    Assignee: ASM Japan, K.K.
    Inventors: Hiroshi Shinriki, Daekyun Jeong
  • Publication number: 20090155997
    Abstract: A method of forming a Ta—Ru metal liner layer for Cu wiring includes: (i) conducting atomic deposition of Ta X times, each atomic deposition of Ta being accomplished by a pulse of hydrogen plasma, wherein X is an integer such that a surface of an underlying layer is not covered with Ta particles; (ii) after step (i), conducting atomic deposition of Ru Y times, each atomic deposition of Ru being accomplished by a pulse of hydrogen plasma, wherein Y is an integer such that the Ta particles are not covered with Ru particles; and (iii) repeating steps (i) and (ii) Z times, thereby forming a Ta—Ru metal liner layer on a Cu wiring substrate.
    Type: Application
    Filed: December 12, 2007
    Publication date: June 18, 2009
    Applicant: ASM JAPAN K.K.
    Inventors: Hiroshi SHINRIKI, Daekyun JEONG