Patents by Inventor Dah-Weih Duan
Dah-Weih Duan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240106123Abstract: An exemplary RF module includes a dielectric substrate with metal traces on one surface that connect high frequency components and provide reference ground. Other metal traces on the other surface of the substrate also provide high frequency transmission lines and reference ground. An enclosure made using semiconductor manufacturing technology is mounted to the substrate and has conductive interior recesses defined by extending walls that are connected to the reference ground. The recesses surround the respective components and provide electromagnetic shielding. The dimensional precision in the location and smoothness of the walls and recesses due to the semiconductor manufacturing technology provides repeatable unit-to-unit RF characteristics of the RF module. One way of mounting the enclosure to the substrate uses a plurality of metal bonding bumps extending outwardly from the walls to engage reference ground metal traces on the substrate.Type: ApplicationFiled: August 31, 2022Publication date: March 28, 2024Inventors: Dah-Weih Duan, Elizabeth T Kunkee
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Publication number: 20240047388Abstract: A semiconductor technology implemented high-frequency channelized filter includes a dielectric substrate with metal traces disposed on one of two major surfaces of the substrate. An input and output port disposed on the substrate and one of the metal traces carrying a high-frequency signal to be filtered between the input and output port. Other of the metal traces are connected to the one metal trace at intervals along the length of the one metal trace each providing a reactance to the high-frequency signal where the reactance varies with frequency and additional traces of the metal traces serving as a reference ground for the one metal trace and the other metal traces. A silicon enclosure mounted to the substrate with a first planar surface with cavities in the enclosure that extend through the first surface, and internal walls within the silicon enclosure defining the cavities. A layer of conductive metal covers the first planar surface, cavities and the internal walls.Type: ApplicationFiled: October 23, 2023Publication date: February 8, 2024Inventors: Dah-Weih Duan, Elizabeth T. Kunkee, Stephane Larouche
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Patent number: 11837561Abstract: A semiconductor technology implemented high-frequency channelized filter includes a dielectric substrate with metal traces disposed on one of two major surfaces of the substrate. An input and output port disposed on the substrate and one of the metal traces carrying a high-frequency signal to be filtered between the input and output port. Other of the metal traces are connected to the one metal trace at intervals along the length of the one metal trace each providing a reactance to the high-frequency signal where the reactance varies with frequency and additional traces of the metal traces serving as a reference ground for the one metal trace and the other metal traces. A silicon enclosure mounted to the substrate with a first planar surface with cavities in the enclosure that extend through the first surface, and internal walls within the silicon enclosure defining the cavities. A layer of conductive metal covers the first planar surface, cavities and the internal walls.Type: GrantFiled: March 20, 2023Date of Patent: December 5, 2023Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATIONInventors: Dah-Weih Duan, Elizabeth T. Kunkee, Stephane Larouche
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Publication number: 20230230942Abstract: A semiconductor technology implemented high-frequency channelized filter includes a dielectric substrate with metal traces disposed on one of two major surfaces of the substrate. An input and output port disposed on the substrate and one of the metal traces carrying a high-frequency signal to be filtered between the input and output port. Other of the metal traces are connected to the one metal trace at intervals along the length of the one metal trace each providing a reactance to the high-frequency signal where the reactance varies with frequency and additional traces of the metal traces serving as a reference ground for the one metal trace and the other metal traces. A silicon enclosure mounted to the substrate with a first planar surface with cavities in the enclosure that extend through the first surface, and internal walls within the silicon enclosure defining the cavities. A layer of conductive metal covers the first planar surface, cavities and the internal walls.Type: ApplicationFiled: March 20, 2023Publication date: July 20, 2023Inventors: Dah-Weih Duan, Elizabeth T. Kunkee, Stephane Larouche
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Patent number: 11706851Abstract: An exemplary semiconductor technology implemented microwave filter includes a dielectric substrate with metal traces on one surface that function as frequency selective circuits and reference ground. A top enclosure encloses the substrate have respective interior recesses with deposited continuous metal coatings. A plurality of metal bonding bumps or bonding wall extends outwardly from the projecting walls of the bottom and top enclosures. The bonding bumps on the top enclosure engage reference ground metal traces on respective surface of the substrate. As a result of applied pressure, the bonding bumps and respective reference ground metal traces together with the through-substrate vias form a metal-to-metal singly-connected ground reference structure for the entire circuitry.Type: GrantFiled: August 26, 2022Date of Patent: July 18, 2023Assignee: Northrop Grumann Systems CorporationInventors: Elizabeth T Kunkee, Dah-Weih Duan, Dino Ferizovic, Chunbo Zhang, Greta S Tsai, Ming-Jong Shiau, Daniel R Scherrer, Martin E Roden
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Patent number: 11658136Abstract: A semiconductor technology implemented high-frequency channelized filter includes a dielectric substrate with metal traces disposed on one of two major surfaces of the substrate. An input and output port disposed on the substrate and one of the metal traces carrying a high-frequency signal to be filtered between the input and output port. Other of the metal traces are connected to the one metal trace at intervals along the length of the one metal trace each providing a reactance to the high-frequency signal where the reactance varies with frequency and additional traces of the metal traces serving as a reference ground for the one metal trace and the other metal traces. A silicon enclosure mounted to the substrate with a first planar surface with cavities in the enclosure that extend through the first surface, and internal walls within the silicon enclosure defining the cavities. A layer of conductive metal covers the first planar surface, cavities and the internal walls.Type: GrantFiled: May 16, 2022Date of Patent: May 23, 2023Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATIONInventors: Dah-Weih Duan, Elizabeth T. Kunkee, Stephane Larouche
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Publication number: 20220408526Abstract: An exemplary semiconductor technology implemented microwave filter includes a dielectric substrate with metal traces on one surface that function as frequency selective circuits and reference ground. A top enclosure encloses the substrate have respective interior recesses with deposited continuous metal coatings. A plurality of metal bonding bumps or bonding wall extends outwardly from the projecting walls of the bottom and top enclosures. The bonding bumps on the top enclosure engage reference ground metal traces on respective surface of the substrate. As a result of applied pressure, the bonding bumps and respective reference ground metal traces together with the through-substrate vias form a metal-to-metal singly-connected ground reference structure for the entire circuitry.Type: ApplicationFiled: August 26, 2022Publication date: December 22, 2022Inventors: Elizabeth T. Kunkee, Dah-Weih Duan, Dino Ferizovic, Chunbo Zhang, Greta S. Tsai, Ming-Jong Shiau, Daniel R. Scherrer, Martin E. Roden
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Patent number: 11470695Abstract: An exemplary semiconductor technology implemented microwave filter includes a dielectric substrate with metal traces on one surface that function as frequency selective circuits and reference ground. Other metal traces on the other surface of the substrate also provide reference ground. Bottom and top enclosures that enclose the substrate have respective interior recesses with deposited continuous metal coatings. A plurality of metal bonding bumps or bonding wall extends outwardly from the projecting walls of the bottom and top enclosures. The bonding bumps on the bottom and top enclosures engage reference ground metal traces on respective surfaces of the substrate. As a result of applied pressure, the bonding bumps and respective reference ground metal traces together with the through-substrate vias form a metal-to-metal singly-connected ground reference structure for the entire circuitry.Type: GrantFiled: April 28, 2020Date of Patent: October 11, 2022Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATIONInventors: Elizabeth T Kunkee, Dah-Weih Duan, Dino Ferizovic, Chunbo Zhang, Greta S Tsai, Ming-Jong Shiau, Daniel R Scherrer, Martn E Roden
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Publication number: 20220289559Abstract: A microelectronics H-frame device includes: a stack of two or more substrates wherein the substrate stack comprises a top substrate and a bottom substrate, wherein bonding of the top substrate to the bottom substrate creates a vertical electrical connection between the top substrate and the bottom substrate, wherein the top surface of the top substrate comprises top substrate top metallization, wherein the bottom surface of the bottom substrate comprises bottom substrate bottom metallization; mid-substrate metallization located between the top substrate and the bottom substrate; a micro-machined top cover bonded to a top side of the substrate stack; and a micro-machined bottom cover bonded to a bottom side of the substrate stack.Type: ApplicationFiled: March 11, 2021Publication date: September 15, 2022Inventors: Dah-Weih Duan, Elizabeth T. Kunkee, Martin E. Roden, Laura M. Woo
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Publication number: 20220295629Abstract: A microelectronics H-frame device comprising an RF crossover includes: a stack of two or more substrates, wherein a bottom surface of a top substrate comprises top substrate bottom metallization, and wherein a top surface of a bottom substrate comprises bottom substrate top metallization, wherein the top substrate bottom metallization and the bottom substrate top metallization form a ground plane that provides isolation to allow a first signal line to traverse one or more of the top substrate and the bottom substrate without being disturbed by a second signal line traversing one or more of the top substrate and the bottom substrate at a non-zero angle relative to the first signal line, at least one of the first signal line and the second signal line passing to a second level with the protection of the ground plane, thereby providing isolation from the other signal line.Type: ApplicationFiled: March 31, 2021Publication date: September 15, 2022Inventors: DAH-WEIH DUAN, ELIZABETH T. KUNKEE, MARTIN E. RODEN, LAURA M. WOO
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Publication number: 20220278059Abstract: A semiconductor technology implemented high-frequency channelized filter includes a dielectric substrate with metal traces disposed on one of two major surfaces of the substrate. An input and output port disposed on the substrate and one of the metal traces carrying a high-frequency signal to be filtered between the input and output port. Other of the metal traces are connected to the one metal trace at intervals along the length of the one metal trace each providing a reactance to the high-frequency signal where the reactance varies with frequency and additional traces of the metal traces serving as a reference ground for the one metal trace and the other metal traces. A silicon enclosure mounted to the substrate with a first planar surface with cavities in the enclosure that extend through the first surface, and internal walls within the silicon enclosure defining the cavities. A layer of conductive metal covers the first planar surface, cavities and the internal walls.Type: ApplicationFiled: May 16, 2022Publication date: September 1, 2022Inventors: Dah-Weih Duan, Elizabeth T. Kunkee, Stephane Larouche
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Patent number: 11373965Abstract: An exemplary semiconductor technology implemented channelized filter includes a dielectric substrate with semiconductor fabricated metal traces on one surface, and input and output ports. A signal trace connected between the input and output port carries the signal to be filtered. Filter traces connect at intervals along the length of the signal trace to provide a reactance that varies with frequency. Ground traces provide a reference ground. A silicon enclosure with semiconductor fabricated cavities has a metal layer deposited over it. The periphery of the enclosure is dimensioned to engage corresponding ground traces about the periphery of the substrate. Walls of separate cavities enclose each of the filter traces to individually surround each thereby providing electromagnetic field isolation. Metal-to-metal conductive bonds are formed between cavity walls that engage the ground traces to establish a common reference ground.Type: GrantFiled: July 17, 2020Date of Patent: June 28, 2022Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATIONInventors: Dah-Weih Duan, Elizabeth T. Kunkee, Stephane Larouche
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Publication number: 20220020708Abstract: An exemplary semiconductor technology implemented channelized filter includes a dielectric substrate with semiconductor fabricated metal traces on one surface, and input and output ports. A signal trace connected between the input and output port carries the signal to be filtered. Filter traces connect at intervals along the length of the signal trace to provide a reactance that varies with frequency. Ground traces provide a reference ground. A silicon enclosure with semiconductor fabricated cavities has a metal layer deposited over it. The periphery of the enclosure is dimensioned to engage corresponding ground traces about the periphery of the substrate. Walls of separate cavities enclose each of the filter traces to individually surround each thereby providing electromagnetic field isolation. Metal-to-metal conductive bonds are formed between cavity walls that engage the ground traces to establish a common reference ground.Type: ApplicationFiled: July 17, 2020Publication date: January 20, 2022Inventors: Dah-Weih Duan, Elizabeth T. Kunkee, Stephane Larouche
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Publication number: 20210337638Abstract: An exemplary semiconductor technology implemented microwave filter includes a dielectric substrate with metal traces on one surface that function as frequency selective circuits and reference ground. Other metal traces on the other surface of the substrate also provide reference ground. Bottom and top enclosures that enclose the substrate have respective interior recesses with deposited continuous metal coatings. A plurality of metal bonding bumps or bonding wall extends outwardly from the projecting walls of the bottom and top enclosures. The bonding bumps on the bottom and top enclosures engage reference ground metal traces on respective surfaces of the substrate. As a result of applied pressure, the bonding bumps and respective reference ground metal traces together with the through-substrate vias form a metal-to-metal singly-connected ground reference structure for the entire circuitry.Type: ApplicationFiled: April 28, 2020Publication date: October 28, 2021Inventors: Elizabeth T. Kunkee, Dah-Weih Duan, Dino Ferizovic, Chunbo Zhang, Greta S. Tsai, Ming-Jong Shiau, Daniel R. Scherrer, Martn E. Roden
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Patent number: 9843301Abstract: A transformer balun fabricated in silicon and including a series of alternating metal layers and dielectric layers that define first and second outer conductors that are part of a coaxial structure. Each dielectric layer includes a plurality of conductive vias extending through the dielectric layer to provide electrical contact between opposing metal layers, where a top metal layer forms a top wall of each outer conductor and a bottom metal layer forms a bottom wall of each outer conductor and the other metal layers and the dielectric layers define sidewalls of the outer conductors. Inner conductors extends down both of the first and second outer conductors and a first output line is electrically coupled to a sidewall of the first outer conductor and a second output line is electrically coupled to a sidewall of the second outer conductor.Type: GrantFiled: July 14, 2016Date of Patent: December 12, 2017Assignee: Northrop Grumman Systems CorporationInventors: Paul L. Rodgers, Dah-Weih Duan
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Patent number: 9761547Abstract: A system and method for vertically integrating heterogeneous devices into a 3D tile architecture are disclosed. The system uses high precision microelectronics fabrication techniques and known-good-die to achieve high yield to integrate devices to process radio frequency signals at microwave frequencies of approximately 300 MHz to 300 GHz and above. The inventive architecture is based on a high density of small diameter vias to manage the integrity of electrical interconnects and simplify electrical routing.Type: GrantFiled: October 17, 2016Date of Patent: September 12, 2017Assignee: Northrop Grumman Systems CorporationInventors: Elizabeth T. Kunkee, Charles M. Jackson, Dah-Weih Duan
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Patent number: 9431715Abstract: A flared feed horn including a plurality of signal lines deposited on a bottom surface of a substrate and forming part of a TE11 sum mode launcher, a ground plane deposited a top surface of the substrate, and an outer conductor electrically coupled to the ground plane and having an internal chamber, where the conductor includes a flared portion and a cylindrical portion. The outer conductor includes an opening opposite to the substrate defining an aperture of the feed horn. The feed horn also includes an embedded conductor positioned within the chamber and being coaxial with the outer conductor, where the embedded conductor is in electrical contact with the plurality of signal lines. The feed horn also includes a TE12 difference mode launcher electrically coupled to the outer conductor proximate the aperture.Type: GrantFiled: August 4, 2015Date of Patent: August 30, 2016Assignee: Northrop Grumman Systems CorporationInventors: Arun K. Bhattacharyya, Gregory P. Krishmar-Junker, Philip W. Hon, Shih-en Shih, David I. Stones, Dah-Weih Duan, Loc Chau
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Patent number: 8049625Abstract: An RFID tag's mobility can be increased and cost can be decreased by using high-performance mobile power antennas instead of battery powered tags. Disclosed are some power antennas that include a half wave rectifier, a full wave rectifier, and a voltage multiplier. These antennas can be cascaded to boost the power or voltage gain. Additionally, planar elements can be added to increase efficiency without decreasing mobility.Type: GrantFiled: March 27, 2009Date of Patent: November 1, 2011Assignee: Intermac Technologies CorporationInventors: Dah-Weih Duan, Daniel J. Friedman, Harley Kent Heinrich, Ian Bardwell-Jones, Louis R. Ruggiero
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Patent number: 7711159Abstract: A mobile system having a portable fingerprint collecting system for generating a digitized image of a fingerprint collected from a subject, a database system configured to store a database containing a plurality of fingerprint templates cross-referenced with identification information, the database system configured to compare the digitized fingerprint images generated by the portable fingerprint collecting device with the fingerprint templates stored in the database to provide identification information for the fingerprint, and a communication system providing real time communication of the digitized fingerprint image and identification information between the portable fingerprint collecting system and the database system.Type: GrantFiled: March 20, 2006Date of Patent: May 4, 2010Assignee: Intermec IP Corp.Inventors: Arvin D. Danielson, Pixie Austin, Michael John Brady, Patricia Brady, legal representative, Dah-Weih Duan, John H. Sherman, John H. Sherman, Jr.
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Patent number: 7511621Abstract: An RFID tag's mobility can be increased and cost can be decreased by using high-performance mobile power antennas instead of battery powered tags. Disclosed are some power antennas that include a half wave rectifier, a full wave rectifier, and a voltage multiplier. These antennas can be cascaded to boost the power or voltage gain. Additionally, planar elements can be added to increase efficiency without decreasing mobility.Type: GrantFiled: March 30, 2007Date of Patent: March 31, 2009Assignee: Intermec IP Corp.Inventors: Dah-Weih Duan, Daniel J. Friedman, Harley Kent Heinrich, Ian Bardwell-Jones, Lou Ruggiero