Patents by Inventor Daiki Komatsu
Daiki Komatsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8395054Abstract: To provide a substrate for mounting a semiconductor element, in which fine-pitch wiring layers are formed to allow a semiconductor element to be mounted, while heat generated in the semiconductor element will not result in a decrease in reliability. Semiconductor-element mounting substrate sandwiches low-thermal-expansion substrate with upper interlayer resin layer and lower interlayer resin layer, and conductive circuit of organic substrate and first conductive circuit of low-thermal-expansion substrate are connected by via conductor formed in interlayer resin layer. Therefore, low-thermal-expansion substrate for mounting semiconductor element may be connected to organic substrate that is connected to outside substrates, without arranging an organic substrate and resin layers on the lower surface of low-thermal-expansion substrate, where impact from the thermal history of semiconductor element is notable.Type: GrantFiled: November 12, 2009Date of Patent: March 12, 2013Assignee: Ibiden Co., Ltd.Inventors: Takashi Kariya, Daiki Komatsu
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Patent number: 8378230Abstract: A printed wiring board includes an interlayer resin insulation layer having the first surface, the second surface on the opposite side of the first surface, and a penetrating hole for a via conductor, a conductive circuit formed on the first surface of the interlayer resin insulation layer, a via conductor formed in the penetrating hole and connected to the conductive circuit on the first surface of the interlayer resin insulation layer, and a surface-treatment coating formed on the surface of the via conductor exposed from the second surface of the interlayer resin insulation layer through the penetrating hole. The via conductor is made of a first conductive layer formed on the side wall of the penetrating hole and a plated-metal filling the penetrating hole. The surface of the via conductor is recessed from the second surface of the interlayer resin insulation layer.Type: GrantFiled: April 30, 2010Date of Patent: February 19, 2013Assignee: Ibiden Co., Ltd.Inventors: Masahiro Kaneko, Daiki Komatsu, Satoru Kose, Hirokazu Higashi
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Patent number: 8373069Abstract: An electronic component mounting substrate including a support layer made of resin with first and second surfaces, an organic insulation layer on the first surface of the support layer with a first surface on opposite side of the first surface of the support layer and a second surface in contact with the first surface of the support layer, an inorganic insulation layer on the first surface of the organic layer, a conductor on the second surface of the support layer, and a first conductive circuit on the second surface of the organic layer. The inorganic layer has a second conductive circuit and a pad for mounting an electronic component inside the inorganic layer. The organic layer has a via conductor inside the organic layer and connecting the first and second circuits. The support layer has a conductive post inside the support layer and connecting the first circuit and the conductor.Type: GrantFiled: December 24, 2009Date of Patent: February 12, 2013Assignee: Ibiden Co., Ltd.Inventors: Takashi Kariya, Daiki Komatsu
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Patent number: 8362367Abstract: A method for manufacturing a multilayer printed wiring board suitable for forming fine conductive circuits. A multilayer printed wiring board is formed with a first insulative material and a first conductive circuit formed on the first insulative material. A second insulative material is formed on the first insulative material and the first conductive circuit, and has an opening portion that reaches the first conductive circuit. A second conductive circuit is formed on the second insulative material and a via conductor is formed in the opening portion and connecting the first conductive circuit and the second conductive circuit. An insulative thin film is formed on at least part of the side surface of the first conductive circuit, and the via conductor is directly connected to the surface of the first conductive circuit exposed through the opening portion.Type: GrantFiled: September 25, 2009Date of Patent: January 29, 2013Assignee: Ibiden Co., Ltd.Inventor: Daiki Komatsu
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Patent number: 8300322Abstract: A variable magnification optical system includes a negative first lens group, a stop and a positive second lens group, arranged from the object side in the order mentioned above. The magnification of the variable magnification optical system is changed by changing a distance between the first lens group and the second lens group in the direction of an optical axis. The first lens group includes a negative plastic lens, and the second lens group includes a positive plastic lens. Further, the following formulas (1) and (2) are satisfied: 5.0<fpp/fw<7.5 (1); and ?7.0<fpn/fw<?6.0 (2), where fpn is the focal length of the plastic lens having negative refractive power, fpp is the focal length of the plastic lens having positive refractive power, and fw is the focal length of the entire system of the variable magnification optical system at a wide angle end.Type: GrantFiled: May 16, 2011Date of Patent: October 30, 2012Assignee: Fujifilm CorporationInventor: Daiki Komatsu
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Publication number: 20120181708Abstract: A substrate for mounting a semiconductor includes a first insulation layer having first and second surfaces on the opposite sides and having a penetrating hole penetrating through the first insulation layer, an electrode formed in the penetrating hole in the first insulation layer and having a protruding portion protruding from the second surface of the first insulation layer, a first conductive pattern formed on the first surface of the first insulation layer and connected to the electrode, a second insulation layer formed on the first surface of the first insulation layer and the first conductive pattern and having a penetrating hole penetrating through the second insulating layer, a second conductive pattern formed on the second insulation layer and for mounting a semiconductor element, and a via conductor formed in the penetrating hole in the second insulation layer and connecting the first and second conductive patterns.Type: ApplicationFiled: September 30, 2011Publication date: July 19, 2012Applicant: IBIDEN CO., LTD.Inventors: Toshiki FURUTANI, Daiki Komatsu, Masatoshi Kunieda, Naomi Fujita, Nobuya Takahashi
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Publication number: 20120175754Abstract: A wiring board including a core substrate made of an insulative material and having a penetrating portion, a first interlayer insulation layer formed on the surface of the core substrate, a first conductive circuit formed on the surface of the first interlayer insulation layer, a first via conductor formed in the first interlayer insulation layer, and an electronic component accommodated in the penetrating portion of the core substrate and including a semiconductor element, a bump body mounted on the semiconductor element, a conductive circuit connected to the bump body, an interlayer resin insulation layer formed on the conductive circuit, and a via conductor formed in the interlayer resin insulation layer. The first via conductor has a tapering direction which is opposite of a tapering direction of the via conductor in the electronic component.Type: ApplicationFiled: September 28, 2011Publication date: July 12, 2012Applicant: IBIDEN CO., LTD.Inventors: Toshiki FURUTANI, Daiki KOMATSU, Nobuya TAKAHASHI, Masatoshi KUNIEDA, Naomi FUJITA, Koichi TSUNODA, Minetaka OYAMA, Toshimasa YANO
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Patent number: 8188378Abstract: An interposer having a support substrate, a first insulation layer made of an inorganic material and formed over the support substrate, and a second insulation layer formed over the first insulation layer. The first insulation layer has a first land, a second land and a first wiring electrically connecting the first land and the second land. The second insulation layer has a first pad positioned to load a first electronic component, a second pad positioned to load a second electronic component, a second wiring electrically connected to the second pad, a first via conductor electrically connecting the first land and the first pad, and a second via conductor electrically connecting the second land and the second wiring. The first wiring and second wiring electrically connect the first pad and the second pad, and the second wiring has a lower wiring resistance per unit length than the first wiring.Type: GrantFiled: December 29, 2008Date of Patent: May 29, 2012Assignee: Ibiden Co., Ltd.Inventors: Hajime Sakamoto, Shuichi Kawano, Daiki Komatsu, Toshiki Furutani, Hiroshi Segawa
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Patent number: 8173907Abstract: An interposer includes a first insulating layer made of an inorganic material and having a first land, a second land and a first wiring electrically connecting the first land and the second land, and a second insulating layer formed over a first surface of the first insulating layer and having a second wiring, a second pad for loading a second electronic component over the second insulating layer and a first via conductor electrically connecting the second land and the second wire. The first wiring and the second wiring electrically connect the first land and the second pad. The first land and second land are positioned such that a first electronic component is mounted over a second surface of the first insulating layer on the opposite side of the first surface. The second wiring has a longer wiring length and a greater thickness than the first wiring.Type: GrantFiled: December 29, 2008Date of Patent: May 8, 2012Assignee: Ibiden Co., Ltd.Inventors: Hajime Sakamoto, Shuichi Kawano, Daiki Komatsu, Hiroshi Segawa
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Publication number: 20120080786Abstract: An electronic component including a wiring board having interlayer insulation layers and conductive patterns, the wiring board having a first surface and a second surface on the opposite side of the first surface, multiple first bumps formed on a first conductive pattern positioned on the first surface of the wiring board among the conductive patterns of the wiring board, a semiconductor element mounted on the first surface of the wiring board through the first bumps, an encapsulating resin encapsulating the semiconductor element and at least a portion of a side surface of the wiring board, the side surface of the wiring board extending between the first surface and second surface of the wiring board, and multiple of second bumps formed on the second surface of the wiring board and connected to a second conductive pattern of the conductive patterns in the wiring board.Type: ApplicationFiled: August 22, 2011Publication date: April 5, 2012Applicant: IBIDEN CO., LTD.Inventors: Toshiki FURUTANI, Daiki Komatsu, Nobuya Takahashi
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Publication number: 20120018198Abstract: An electronic component including a substrate having a surface and one or more trench portions opening on the surface, a capacitor portion having a lower electrode formed on the surface of the substrate and on the wall surface of the trench portion, a dielectric layer formed on the lower electrode, and an upper electrode formed on the dielectric layer, a resin filler filling the space inside the trench portion lined by the upper electrode, an insulation layer formed on the surface of the substrate, a conductive portion formed on the insulation layer and positioned to cover the trench portion, and a via conductor connecting the conductive portion and one of the lower electrode and the upper electrode.Type: ApplicationFiled: March 29, 2011Publication date: January 26, 2012Applicant: IBIDEN CO., LTD.Inventors: Toshiki FURUTANI, Minetaka Oyama, Daiki Komatsu, Koichi Tsunoda, Toshimasa Yano
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Publication number: 20110279906Abstract: A variable magnification optical system includes a negative first lens group, a stop and a positive second lens group, arranged from the object side in the order mentioned above. The magnification of the variable magnification optical system is changed by changing a distance between the first lens group and the second lens group in the direction of an optical axis. The first lens group includes a negative plastic lens, and the second lens group includes a positive plastic lens. Further, the following formulas (1) and (2) are satisfied: 5.0<fpp/fw<7.5??(1); and ?7.0<fpn/fw<?6.0??(2), where fpn is the focal length of the plastic lens having negative refractive power, fpp is the focal length of the plastic lens having positive refractive power, and fw is the focal length of the entire system of the variable magnification optical system at a wide angle end.Type: ApplicationFiled: May 16, 2011Publication date: November 17, 2011Applicant: FUJIFILM CORPORATIONInventor: Daiki KOMATSU
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Publication number: 20110265324Abstract: A method for manufacturing an interposer including forming a first insulating layer comprising an inorganic material on a supporting substrate, forming a first wire in the first insulating layer, forming a second insulating layer on a first side of the first insulating layer, forming a second wire with a longer wire length and a greater thickness than the first wire on the second insulating layer, and removing the supporting substrate.Type: ApplicationFiled: July 15, 2011Publication date: November 3, 2011Applicant: IBIDEN CO., LTD.Inventors: Hajime Sakamoto, Shuichi Kawano, Daiki Komatsu, Hiroshi Segawa
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Publication number: 20110067913Abstract: A printed wiring board includes an interlayer resin insulation layer having the first surface, the second surface on the opposite side of the first surface, and a penetrating hole for a via conductor, a conductive circuit formed on the first surface of the interlayer resin insulation layer, a via conductor formed in the penetrating hole and connected to the conductive circuit on the first surface of the interlayer resin insulation layer, and a surface-treatment coating formed on the surface of the via conductor exposed from the second surface of the interlayer resin insulation layer through the penetrating hole. The via conductor is made of a first conductive layer formed on the side wall of the penetrating hole and a plated-metal filling the penetrating hole. The surface of the via conductor is recessed from the second surface of the interlayer resin insulation layer.Type: ApplicationFiled: April 30, 2010Publication date: March 24, 2011Applicant: IBIDEN CO., LTD.Inventors: Masahiro KANEKO, Daiki Komatsu, Satoru Kose, Hirokazu Higashi
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Publication number: 20100244242Abstract: A semiconductor device including a first substrate having first and second surfaces, multiple first mounting pads formed on the first surface of the first substrate and for mounting a first semiconductor element on the first surface of the first substrate, multiple first connection pads formed on the first surface of the first substrate and positioned on the periphery of the multiple first mounting pads, a second substrate formed on the first substrate and having first and second surfaces, the second substrate having a second penetrating electrode which penetrates through the first and second surfaces of the second substrate, multiple second mounting pads formed on the first surface of the second substrate and for mounting a second semiconductor element, and a conductive member formed on one of the first connection pads and electrically connecting an end portion of the second penetrating electrode and the one of the first connection pads.Type: ApplicationFiled: January 28, 2010Publication date: September 30, 2010Applicant: IBIDEN CO., LTD.Inventors: Daiki KOMATSU, Kazuhiro YOSHIKAWA
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Publication number: 20100243299Abstract: A multilayer printed wiring board includes a core base material having a penetrating portion, a low-thermal-expansion substrate accommodated inside the penetrating portion of the core base material and having a first surface for mounting a semiconductor element and a second surface on the opposite side of the first surface, a first through-hole conductor provided inside the low-thermal-expansion substrate and provided for electrical connection between the first surface and the second surface of the low-thermal-expansion substrate, a filler filled in a gap between the low-thermal-expansion substrate and an inner wall of the core base material, and a wiring layer formed on at least one of the first surface and the second surface of the low-thermal-expansion substrate and having a resin insulation layer and a conductive layer. The wiring layer has a via conductor connecting the first through-hole conductor and the conductive layer.Type: ApplicationFiled: October 30, 2009Publication date: September 30, 2010Applicant: IBIDEN CO., LTD.Inventors: Takashi Kariya, Kazuhiro Yoshikawa, Daiki Komatsu, Ramesh Bhandari
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Publication number: 20100230148Abstract: To provide a substrate for mounting a semiconductor element, in which fine-pitch wiring layers are formed to allow a semiconductor element to be mounted, while heat generated in the semiconductor element will not result in a decrease in reliability. Semiconductor-element mounting substrate sandwiches low-thermal-expansion substrate with upper interlayer resin layer and lower interlayer resin layer, and conductive circuit of organic substrate and first conductive circuit of low-thermal-expansion substrate are connected by via conductor formed in interlayer resin layer. Therefore, low-thermal-expansion substrate for mounting semiconductor element may be connected to organic substrate that is connected to outside substrates, without arranging an organic substrate and resin layers on the lower surface of low-thermal-expansion substrate, where impact from the thermal history of semiconductor element is notable.Type: ApplicationFiled: November 12, 2009Publication date: September 16, 2010Applicant: IBIDEN, CO., LTD.Inventors: Takashi Kariya, Daiki Komatsu
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Publication number: 20100200279Abstract: An electronic component mounting substrate including a support layer made of resin with first and second surfaces, an organic insulation layer on the first surface of the support layer with a first surface on opposite side of the first surface of the support layer and a second surface in contact with the first surface of the support layer, an inorganic insulation layer on the first surface of the organic layer, a conductor on the second surface of the support layer, and a first conductive circuit on the second surface of the organic layer. The inorganic layer has a second conductive circuit and a pad for mounting an electronic component inside the inorganic layer. The organic layer has a via conductor inside the organic layer and connecting the first and second circuits. The support layer has a conductive post inside the support layer and connecting the first circuit and the conductor.Type: ApplicationFiled: December 24, 2009Publication date: August 12, 2010Applicant: IBIDEN CO., LTD.Inventors: Takashi KARIYA, Daiki Komatsu
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Publication number: 20100078212Abstract: A method for manufacturing a multilayer printed wiring board suitable for forming fine conductive circuits. A multilayer printed wiring board is formed with a first insulative material and a first conductive circuit formed on the first insulative material. A second insulative material is formed on the first insulative material and the first conductive circuit, and has an opening portion that reaches the first conductive circuit. A second conductive circuit is formed on the second insulative material and a via conductor is formed in the opening portion and connecting the first conductive circuit and the second conductive circuit. An insulative thin film is formed on at least part of the side surface of the first conductive circuit, and the via conductor is directly connected to the surface of the first conductive circuit exposed through the opening portion.Type: ApplicationFiled: September 25, 2009Publication date: April 1, 2010Applicant: IBIDEN, CO., LTD.Inventor: Daiki Komatsu
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Publication number: 20090173522Abstract: An interposer having a support substrate, a first insulation layer made of an inorganic material and formed over the support substrate, and a second insulation layer formed over the first insulation layer. The first insulation layer has a first land, a second land and a first wiring electrically connecting the first land and the second land. The second insulation layer has a first pad positioned to load a first electronic component, a second pad positioned to load a second electronic component, a second wiring electrically connected to the second pad, a first via conductor electrically connecting the first land and the first pad, and a second via conductor electrically connecting the second land and the second wiring. The first wiring and second wiring electrically connect the first pad and the second pad, and the second wiring has a lower wiring resistance per unit length than the first wiring.Type: ApplicationFiled: December 29, 2008Publication date: July 9, 2009Applicant: IBIDEN CO., LTDInventors: Hajime Sakamoto, Shuichi Kawano, Daiki Komatsu, Toshiki Furutani, Hiroshi Segawa