Patents by Inventor Daiki Yamada

Daiki Yamada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240128006
    Abstract: A laminated coil component includes: an element body having a first surface and a second surface facing each other in a first direction; a coil unit formed by laminating a plurality of coil conductors in a second direction orthogonal to the first direction inside the element body; a first lead-out conductor; and a second lead-out conductor. A first coil conductor adjacent to the first lead-out conductor in the second direction includes a first side portion extending along the first surface, on a first surface side. A second coil conductor adjacent to the second lead-out conductor in the second direction includes a second side portion extending along the second surface, on a second surface side. The first side portion has a larger line width than other side portions of the first coil conductor and the second side portion.
    Type: Application
    Filed: October 11, 2023
    Publication date: April 18, 2024
    Applicant: TDK CORPORATION
    Inventors: Yuya OSHIMA, Hiroshi ONO, Ryosuke HORIE, Daiki YAMADA, Yuki AKASAKA, Shuichi WATANABE, Satoshi TAKASU, Makoto YOSHINO, Takahiro YATA
  • Publication number: 20240105884
    Abstract: Performance of an electronic device is improved. A substrate for transfer includes a substrate having a surface and made of a visible light transmitting material, and an elastic deformation portion fixed on the surface of the substrate, transmitting visible light, and made of an elastically deformable material. The elastic deformation portion includes a plurality of element holding portions, and a plurality of protrusions arranged at positions not overlapping with the plurality of element holding portions, and protruding higher than the plurality of element holding portions when the surface of the substrate is a reference plane.
    Type: Application
    Filed: September 20, 2023
    Publication date: March 28, 2024
    Inventors: Kenichi TAKEMASA, Kazuyuki YAMADA, Keisuke ASADA, Daiki ISONO
  • Patent number: 11943243
    Abstract: In an anomaly detection method that determines whether each frame in observation data constituted by a collection of frames sent and received over a communication network system is anomalous, a difference between a data distribution of a feature amount extracted from the frame in the observation data and a data distribution for a collection of frames sent and received over the communication network system, obtained at a different timing from the observation data, is calculated. A frame having a feature amount for which the difference is predetermined value or higher is determined to be an anomalous frame. An anomaly contribution level of feature amounts extracted from the frame determined to be an anomalous frame is calculated, and an anomalous payload part, which is at least one part of the payload corresponding to the feature amount for which the anomaly contribution level is at least the predetermined value, is output.
    Type: Grant
    Filed: May 17, 2021
    Date of Patent: March 26, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Takamitsu Sasaki, Tomoyuki Haga, Daiki Tanaka, Makoto Yamada, Hisashi Kashima, Takeshi Kishikawa
  • Publication number: 20240081980
    Abstract: A vocalization assistance device includes: a mounting body that is mounted in an oral cavity of a person and that has a facing portion facing a palate of the person; a diaphragm that is provided at the facing portion and that is capable of outputting a sound recorded by a device having a recording function, as an original sound; and a passage that is provided at the facing portion and that is configured to transmit the original sound output from the diaphragm to a rear side of the oral cavity.
    Type: Application
    Filed: January 25, 2022
    Publication date: March 14, 2024
    Applicant: National University Corporation Tokyo Medical and Dental University
    Inventors: Haruka TOHARA, Taishi YAMADA, Kazuharu NAKAGAWA, Kohei YAMAGUCHI, Daiki MIZUGUCHI
  • Patent number: 11916183
    Abstract: The power storage device includes power storage units arranged with a conductive plate interposed therebetween in the vertical direction, each of the power storage units includes an electrode stack including bipolar electrodes stacked with a separator interposed therebetween, and a sealing member provided around the electrode stack so as to seal a housing space formed between adjacent electrodes of the electrode stack. At least one of the power storage units is provided with an overhang member on an outer peripheral surface of the sealing member. The overhang member includes an inclined portion that extends from the outer peripheral surface of the sealing member toward the outside of the power storage unit and inclines downward as it leaves away from the outer peripheral surface of the sealing member, and a top portion formed at a lower end of the inclined portion.
    Type: Grant
    Filed: December 24, 2019
    Date of Patent: February 27, 2024
    Assignees: TOYOTA JIDOSHA KABUSHIKI KAISHA, KABUSHIKI KAISHA TOYOTA JIDOSHOKKI
    Inventors: Daiki Terashima, Satoshi Morioka, Takuro Kikuchi, Motoyoshi Okumura, Kojiro Tamaru, Hiromi Ueda, Satoshi Hamaoka, Masahiro Yamada
  • Patent number: 11059426
    Abstract: An opening/closing mechanism of a double opening console box includes right and left operation portions for opening a lid around a left or right rotation shaft, and an erroneous operation preventing device for preventing simultaneous right and left opening actions of the lid. The erroneous operation preventing device includes a center projecting portion provided to the lid, an erroneous operation prevention bar movable leftward/rightward relative to the lid, a centering component having a left-right-symmetric recess groove at a front end, and a spring member energizing the centering component in the front-rear direction relative to the erroneous operation prevention bar so that the center projecting portion is located at the rear end bottom of the recess groove.
    Type: Grant
    Filed: October 11, 2019
    Date of Patent: July 13, 2021
    Assignee: TOYODA GOSEI CO., LTD.
    Inventors: Kohei Yoshida, Yasufumi Ike, Keigo Hyozawa, Kunio Yamazaki, Daiki Yamada
  • Publication number: 20200156552
    Abstract: An opening/closing mechanism of a double opening console box includes right and left operation portions for opening a lid around a left or right rotation shaft, and an erroneous operation preventing device for preventing simultaneous right and left opening actions of the lid. The erroneous operation preventing device includes a center projecting portion provided to the lid, an erroneous operation prevention bar movable leftward/rightward relative to the lid, a centering component having a left-right-symmetric recess groove at a front end, and a spring member energizing the centering component in the front-rear direction relative to the erroneous operation prevention bar so that the center projecting portion is located at the rear end bottom of the recess groove.
    Type: Application
    Filed: October 11, 2019
    Publication date: May 21, 2020
    Inventors: Kohei YOSHIDA, Yasufumi IKE, Keigo HYOZAWA, Kunio YAMAZAKI, Daiki YAMADA
  • Patent number: 8999818
    Abstract: A semiconductor element is formed on a first surface of the substrate. A resin layer is formed over a second surface of the substrate which is opposite to the first surface of the substrate and on a part of the side surface of the substrate. A step is formed on the side surface of the substrate. The width of the upper section of the substrate with a step is narrower than the lower section of the substrate with a step. Therefore, the substrate can also be a protrusion.
    Type: Grant
    Filed: December 23, 2008
    Date of Patent: April 7, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hidekazu Takahashi, Daiki Yamada, Yohei Monma, Hiroki Adachi, Shunpei Yamazaki
  • Patent number: 8928131
    Abstract: The semiconductor device of the invention includes a transistor, an insulating layer provided over the transistor, a first conductive layer (corresponding to a source wire or a drain wire) electrically connected to a source region or a drain region of the transistor through an opening portion provided in the insulating layer, a first resin layer provided over the insulating layer and the first conductive layer, a layer containing conductive particles which is electrically connected to the first conductive layer through an opening portion provided in the first resin layer, and a substrate provided with a second resin layer and a second conductive layer serving as an antenna. In the semiconductor device having the above-described structure, the second conductive layer is electrically connected to the first conductive layer with the layer containing conductive particles interposed therebetween. In addition, the second resin layer is provided over the first resin layer.
    Type: Grant
    Filed: August 7, 2013
    Date of Patent: January 6, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hidekazu Takahashi, Daiki Yamada, Kyosuke Ito, Eiji Sugiyama, Yoshitaka Dozen
  • Patent number: 8648439
    Abstract: The present invention provides a thin and bendable semiconductor device utilizing an advantage of a flexible substrate used in the semiconductor device, and a method of manufacturing the semiconductor device. The semiconductor device has at least one surface covered by an insulating layer which serves as a substrate for protection. In the semiconductor device, the insulating layer is formed over a conductive layer serving as an antenna such that the value in the thickness ratio of the insulating layer in a portion not covering the conductive layer to the conductive layer is at least 1.2, and the value in the thickness ratio of the insulating layer formed over the conductive layer to the conductive layer is at least 0.2. Further, not the conductive layer but the insulating layer is exposed in the side face of the semiconductor device, and the insulating layer covers a TFT and the conductive layer.
    Type: Grant
    Filed: April 18, 2013
    Date of Patent: February 11, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshitaka Dozen, Tomoyuki Aoki, Hidekazu Takahashi, Daiki Yamada, Eiji Sugiyama, Kaori Ogita, Naoto Kusumoto
  • Publication number: 20130334611
    Abstract: The semiconductor device of the invention includes a transistor, an insulating layer provided over the transistor, a first conductive layer (corresponding to a source wire or a drain wire) electrically connected to a source region or a drain region of the transistor through an opening portion provided in the insulating layer, a first resin layer provided over the insulating layer and the first conductive layer, a layer containing conductive particles which is electrically connected to the first conductive layer through an opening portion provided in the first resin layer, and a substrate provided with a second resin layer and a second conductive layer serving as an antenna. In the semiconductor device having the above-described structure, the second conductive layer is electrically connected to the first conductive layer with the layer containing conductive particles interposed therebetween. In addition, the second resin layer is provided over the first resin layer.
    Type: Application
    Filed: August 7, 2013
    Publication date: December 19, 2013
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hidekazu TAKAHASHI, Daiki YAMADA, Kyosuke ITO, Eiji SUGIYAMA, Yoshitaka DOZEN
  • Patent number: 8610152
    Abstract: A semiconductor device in which the damage such as cracks, chinks, or dents caused by external stress is reduced is provided. In addition, the yield of a semiconductor device having a small thickness is increased. The semiconductor device includes a light-transmitting substrate having a stepped side surface, the width of which in a portion above the step and closer to one surface is smaller than that in a portion below the step, a semiconductor element layer provided over the other surface of the light-transmitting substrate, and a stack of a first light-transmitting resin layer and a second light-transmitting resin layer, which covers the one surface and part of the side surface of the light-transmitting substrate. One of the first light-transmitting resin layer and the second light-transmitting resin layer has a chromatic color.
    Type: Grant
    Filed: November 29, 2012
    Date of Patent: December 17, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hidekazu Takahashi, Daiki Yamada, Yohei Monma, Hiroki Adachi, Shunpei Yamazaki
  • Publication number: 20130228885
    Abstract: The present invention provides a thin and bendable semiconductor device utilizing an advantage of a flexible substrate used in the semiconductor device, and a method of manufacturing the semiconductor device. The semiconductor device has at least one surface covered by an insulating layer which serves as a substrate for protection. In the semiconductor device, the insulating layer is formed over a conductive layer serving as an antenna such that the value in the thickness ratio of the insulating layer in a portion not covering the conductive layer to the conductive layer is at least 1.2, and the value in the thickness ratio of the insulating layer formed over the conductive layer to the conductive layer is at least 0.2. Further, not the conductive layer but the insulating layer is exposed in the side face of the semiconductor device, and the insulating layer covers a TFT and the conductive layer.
    Type: Application
    Filed: April 18, 2013
    Publication date: September 5, 2013
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshitaka DOZEN, Tomoyuki AOKI, Hidekazu TAKAHASHI, Daiki YAMADA, Eiji SUGIYAMA, Kaori OGITA, Naoto KUSUMOTO
  • Patent number: 8507308
    Abstract: A semiconductor device includes a plurality of semiconductor integrated circuits bonded to a structure body in which a fibrous body is impregnated with an organic resin. The plurality of semiconductor integrated circuits are provided at openings formed in the structure body and each include a photoelectric conversion element, a light-transmitting substrate which has stepped sides and in which the width of the projected section on a first surface side is smaller than that of a second surface, a semiconductor integrated circuit portion provided on the second surface of the light-transmitting substrate, and a chromatic color light-transmitting resin layer which covers the first surface and part of side surfaces of the light-transmitting substrate. The plurality of semiconductor integrated circuits include the chromatic color light-transmitting resin layers of different colors.
    Type: Grant
    Filed: September 24, 2011
    Date of Patent: August 13, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hidekazu Takahashi, Daiki Yamada, Yohei Monma, Takahiro Iguchi, Hiroki Adachi, Shunpei Yamazaki
  • Patent number: 8508027
    Abstract: The semiconductor device of the invention includes a transistor, an insulating layer provided over the transistor, a first conductive layer (corresponding to a source wire or a drain wire) electrically connected to a source region or a drain region of the transistor through an opening portion provided in the insulating layer, a first resin layer provided over the insulating layer and the first conductive layer, a layer containing conductive particles which is electrically connected to the first conductive layer through an opening portion provided in the first resin layer, and a substrate provided with a second resin layer and a second conductive layer serving as an antenna. In the semiconductor device having the above-described structure, the second conductive layer is electrically connected to the first conductive layer with the layer containing conductive particles interposed therebetween. In addition, the second resin layer is provided over the first resin layer.
    Type: Grant
    Filed: September 9, 2009
    Date of Patent: August 13, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hidekazu Takahashi, Daiki Yamada, Kyosuke Ito, Eiji Sugiyama, Yoshitaka Dozen
  • Patent number: 8481370
    Abstract: The present invention provides a semiconductor device having a structure that can be mounted on a wiring substrate, as for the semiconductor device formed over a thin film-thickness substrate, a film-shaped substrate, or a sheet-like substrate. In addition, the present invention provides a method for manufacturing a semiconductor device that is capable of raising a reliability of mounting on a wiring substrate. One feature of the present invention is to bond a semiconductor element formed on a substrate having isolation to a member that a conductive film is formed via a medium having an anisotropic conductivity.
    Type: Grant
    Filed: August 3, 2006
    Date of Patent: July 9, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kazuo Nishi, Hiroki Adachi, Naoto Kusumoto, Yuusuke Sugawara, Hidekazu Takahashi, Daiki Yamada, Yoshikazu Hiura
  • Patent number: 8432018
    Abstract: The present invention provides a thin and bendable semiconductor device utilizing an advantage of a flexible substrate used in the semiconductor device, and a method of manufacturing the semiconductor device. The semiconductor device has at least one surface covered by an insulating layer which serves as a substrate for protection. In the semiconductor device, the insulating layer is formed over a conductive layer serving as an antenna such that the value in the thickness ratio of the insulating layer in a portion not covering the conductive layer to the conductive layer is at least 1.2, and the value in the thickness ratio of the insulating layer formed over the conductive layer to the conductive layer is at least 0.2. Further, not the conductive layer but the insulating layer is exposed in the side face of the semiconductor device, and the insulating layer covers a TFT and the conductive layer.
    Type: Grant
    Filed: October 12, 2011
    Date of Patent: April 30, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshitaka Dozen, Tomoyuki Aoki, Hidekazu Takahashi, Daiki Yamada, Eiji Sugiyama, Kaori Ogita, Naoto Kusumoto
  • Patent number: 8415664
    Abstract: Techniques are provided for obtaining a photoelectric conversion device having a favorable spectral sensitivity characteristic and reduced variation in output current without a contamination substance mixed into a photoelectric conversion layer or a transistor, and for obtaining a highly reliable semiconductor device including a photoelectric conversion device. A semiconductor device may include, over an insulating surface, a first electrode; a second electrode; a color filter between the first electrode and the second electrode; an overcoat layer covering the color filter; and a photoelectric conversion layer over the overcoat layer, where one end portion of the photoelectric conversion layer is in contact with the first electrode, and where an end portion of the color filter lies inside the other end portion of the photoelectric conversion layer.
    Type: Grant
    Filed: October 12, 2011
    Date of Patent: April 9, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tatsuya Arao, Daiki Yamada, Hidekazu Takahashi, Naoto Kusumoto, Kazuo Nishi, Yuusuke Sugawara, Hironobu Takahashi
  • Patent number: 8378484
    Abstract: In order to connect a semiconductor device including an integrated circuit to an external circuit typified by an antenna, the shape of the contact electrode to be formed in the semiconductor device is devised, so that bad connection between the external circuit and the contact electrode is not easily caused and the contact electrode with high reliability is provided. The contact electrode is formed by a screen printing method using a squeegee having a chamfered corner or having a wedge shape. The contact electrode has a peripheral portion and a central portion. The peripheral portion has a tapered portion with its film thickness gradually decreasing from the central portion toward the end portion, and the central portion has a projection portion that continues from the tapered portion.
    Type: Grant
    Filed: April 25, 2007
    Date of Patent: February 19, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Daiki Yamada, Tomoyuki Aoki
  • Patent number: 8362485
    Abstract: An object of the present invention is to provide a structure of a thin film circuit portion and a method for manufacturing a thin film circuit portion by which an electrode for connecting to an external portion can be easily formed under a thin film circuit. A stacked body including a first insulating film, a thin film circuit formed over one surface of the first insulating film, a second insulating film formed over the thin film circuit, an electrode formed over the second insulating film, and a resin film formed over the electrode, is formed. A conductive film is formed adjacent to the other surface of the first insulating film of the stacked body to be overlapped with the electrode. The conductive film is irradiated with a laser.
    Type: Grant
    Filed: December 1, 2011
    Date of Patent: January 29, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Daiki Yamada, Yoshitaka Dozen, Eiji Sugiyama, Hidekazu Takahashi