Patents by Inventor Daisuke CHIKAMORI

Daisuke CHIKAMORI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10242876
    Abstract: Provided is a method including the following steps: forming an insulating film having a thickness of 0.5 ?m or greater on an epitaxial layer provided with a well region, a source region, and a contact region, each being an impurity diffusion region; forming, in the insulating film, an opening that has a dimension of 2 mm×2 mm or greater in a plan view to expose at least part of the impurity diffusion region from the insulating film. The step of forming the opening in the insulating film is performed by the following separate steps: removing the insulating film so as to leave one-half or less of the thickness of the insulating film unremoved, through dry etching by the use of a photoresist; and removing the insulating film until the opening reaches the upper surface of the epitaxial layer, through wet etching by the use of the same photoresist.
    Type: Grant
    Filed: March 26, 2015
    Date of Patent: March 26, 2019
    Assignee: Mitsubishi Electric Corporation
    Inventors: Daisuke Chikamori, Nobuaki Yamanaka, Takamichi Iwakawa
  • Patent number: 10211056
    Abstract: A resist layer is applied to a metal film disposed on a semiconductor substrate, using a positive photoresist having photosensitivity to at least one wavelength. The resist layer is exposed to light including a region of the one wavelength. The exposed resist layer is developed. After the step of developing the resist layer, the metal film is subjected to wet etching with the resist layer used as a mask, in an etching apparatus. The etching apparatus is placed in an environment irradiated with a lighting apparatus that emits light with a wavelength equal to or shorter than the one wavelength cut off.
    Type: Grant
    Filed: April 25, 2014
    Date of Patent: February 19, 2019
    Assignee: Mitsubishi Electric Corporation
    Inventors: Nobuaki Yamanaka, Daisuke Chikamori, Yoshio Muto
  • Patent number: 10074578
    Abstract: Provided is a semiconductor device capable of measuring a depth of removal of a silicon carbide (SiC) wafer with high accuracy through simple steps, and a method for producing the semiconductor device. The semiconductor device according to an aspect of the present invention includes at least one evaluation element disposed on a SiC wafer. The evaluation element includes a doped region doped with a dopant on the SiC wafer, and an insulating film partially covering the doped region. The insulating film includes a plurality of partial insulating films. The doped region includes a plurality of regions sectioned by the plurality of partial insulating films in a plan view.
    Type: Grant
    Filed: February 8, 2017
    Date of Patent: September 11, 2018
    Assignee: Mitsubishi Electric Corporation
    Inventors: Nobuaki Yamanaka, Daisuke Chikamori, Toru Jokaku
  • Patent number: 9881818
    Abstract: A method for manufacturing a semiconductor device, includes: a preparation step, a flow step, and a processing step. The preparation step prepares an etching solution by dissolving titanium in an ammonia-hydrogen peroxide solution in advance before use of the ammonia-hydrogen peroxide solution for etching. The flow step flows the etching solution after the preparation step so that a concentration of the etching solution in a processing bath is constant. The processing step etches a metal film on a semiconductor wafer with the etching solution by putting in the processing bath the semiconductor wafer having a resist film and the metal film after the flow step is started. The metal film is preferably formed of titanium, and a temperature of the etching solution is preferably adjusted by flowing the etching solution so that the etching solution flows via a temperature controller.
    Type: Grant
    Filed: September 19, 2014
    Date of Patent: January 30, 2018
    Assignee: Mitsubishi Electric Corporation
    Inventors: Nobuaki Yamanaka, Daisuke Chikamori, Shinichirou Katsuki
  • Publication number: 20180019130
    Abstract: Provided is a method including the following steps: forming an insulating film having a thickness of 0.5 ?m or greater on an epitaxial layer provided with a well region, a source region, and a contact region, each being an impurity diffusion region; forming, in the insulating film, an opening that has a dimension of 2 mm×2 mm or greater in a plan view to expose at least part of the impurity diffusion region from the insulating film. The step of forming the opening in the insulating film is performed by the following separate steps: removing the insulating film so as to leave one-half or less of the thickness of the insulating film unremoved, through dry etching by the use of a photoresist; and removing the insulating film until the opening reaches the upper surface of the epitaxial layer, through wet etching by the use of the same photoresist.
    Type: Application
    Filed: March 26, 2015
    Publication date: January 18, 2018
    Applicant: Mitsubishi Electric Corporation
    Inventors: Daisuke CHIKAMORI, Nobuaki YAMANAKA, Takamichi IWAKAWA
  • Publication number: 20170352600
    Abstract: Provided is a semiconductor device capable of measuring a depth of removal of a silicon carbide (SiC) wafer with high accuracy through simple steps, and a method for producing the semiconductor device. The semiconductor device according to an aspect of the present invention includes at least one evaluation element disposed on a SiC wafer. The evaluation element includes a doped region doped with a dopant on the SiC wafer, and an insulating film partially covering the doped region. The insulating film includes a plurality of partial insulating films. The doped region includes a plurality of regions sectioned by the plurality of partial insulating films in a plan view.
    Type: Application
    Filed: February 8, 2017
    Publication date: December 7, 2017
    Applicant: Mitsubishi Electric Corporation
    Inventors: Nobuaki YAMANAKA, Daisuke CHIKAMORI, Toru JOKAKU
  • Patent number: 9685566
    Abstract: A target made of a metal material is sputtered to form a metal film on a silicon carbide wafer. At this time, the metal film is formed under a condition that an incident energy of incidence, on the silicon carbide wafer, of the metal material sputtered from the target and a sputtering gas flowed in through a gas inlet port is lower than a binding energy of silicon carbide, and more specifically lower than 4.8 eV. For example, the metal film is formed while a high-frequency voltage applied between a cathode and an anode is set to be equal to or higher than 20V and equal to or lower than 300V.
    Type: Grant
    Filed: November 9, 2012
    Date of Patent: June 20, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventors: Daisuke Chikamori, Yasuhiko Nishio, Naoki Yutani
  • Publication number: 20170154798
    Abstract: A method for manufacturing a semiconductor device, includes: a preparation step, a flow step, and a processing step. The preparation step prepares an etching solution by dissolving titanium in an ammonia-hydrogen peroxide solution in advance before use of the ammonia-hydrogen peroxide solution for etching. The flow step flows the etching solution after the preparation step so that a concentration of the etching solution in a processing bath is constant. The processing step etches a metal film on a semiconductor wafer with the etching solution by putting in the processing bath the semiconductor wafer having a resist film and the metal film after the flow step is started. The metal film is preferably formed of titanium, and a temperature of the etching solution is preferably adjusted by flowing the etching solution so that the etching solution flows via a temperature controller.
    Type: Application
    Filed: September 19, 2014
    Publication date: June 1, 2017
    Applicant: Mitsubishi Electric Corporation
    Inventors: Nobuaki YAMANAKA, Daisuke CHIKAMORI, Shinichirou KATSUKI
  • Publication number: 20160351396
    Abstract: A resist layer is applied to a metal film disposed on a semiconductor substrate, using a positive photoresist having photosensitivity to at least one wavelength. The resist layer is exposed to light including a region of the one wavelength. The exposed resist layer is developed. After the step of developing the resist layer, the metal film is subjected to wet etching with the resist layer used as a mask, in an etching apparatus. The etching apparatus is placed in an environment irradiated with a lighting apparatus that emits light with a wavelength equal to or shorter than the one wavelength cut off.
    Type: Application
    Filed: April 25, 2014
    Publication date: December 1, 2016
    Applicant: Mitsubishi Electric Corporation
    Inventors: Nobuaki YAMANAKA, Daisuke CHIKAMORI, Yoshio MUTO
  • Publication number: 20130196494
    Abstract: A target made of a metal material is sputtered to form a metal film on a silicon carbide wafer. At this time, the metal film is formed under a condition that an incident energy of incidence, on the silicon carbide wafer, of the metal material sputtered from the target and a sputtering gas flowed in through a gas inlet port is lower than a binding energy of silicon carbide, and more specifically lower than 4.8 eV. For example, the metal film is formed while a high-frequency voltage applied between a cathode and an anode is set to be equal to or higher than 20V and equal to or lower than 300V.
    Type: Application
    Filed: November 9, 2012
    Publication date: August 1, 2013
    Inventors: Daisuke CHIKAMORI, Yasuhiko NISHIO, Naoki YUTANI