Patents by Inventor Daisuke Minoura
Daisuke Minoura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11996357Abstract: A wiring substrate includes a first conductor layer, an insulating layer on the first layer such that the insulating layer is covering the first layer, a second conductor layer on the insulating layer such that the insulating layer is formed between the first and second layers, the connection conductors penetrating through the insulating layer and connecting the first and second layers, and a coating film formed at least partially on surface of the first layer such that the film improves adhesion between the first layer and insulating layer. The first layer includes pads and wiring patterns such that the pads are in contact with the connection conductors and that the patterns have surfaces facing the insulating layer and covered by the film, and the pads have roughened surfaces facing the insulating layer and having first surface roughness that is higher than second surface roughness of the surfaces of the patterns.Type: GrantFiled: August 27, 2021Date of Patent: May 28, 2024Assignee: IBIDEN CO., LTD.Inventors: Takema Adachi, Daisuke Minoura
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Patent number: 11929511Abstract: A method of manufacturing a membrane-catalyst assembly including an electrolyte membrane and a catalyst layer bonded to the electrolyte membrane, the method including: a liquid application step of applying, in the atmosphere, a liquid to only a surface of the electrolyte membrane before bonding; and a thermocompression bonding step of bonding, to the catalyst layer, the electrolyte membrane to which the liquid is applied, by thermocompression bonding. Provided is a method of manufacturing a membrane-catalyst assembly including a polymer electrolyte membrane and a catalyst layer bonded to the polymer electrolyte membrane, in which the manufacturing method can achieve both the relaxation of thermocompression bonding conditions and the improvement of adhesion between the catalyst layer and the electrolyte membrane with high productivity.Type: GrantFiled: December 21, 2020Date of Patent: March 12, 2024Assignee: TORAY INDUSTRIES, INC.Inventors: Yuta Shintaku, Ryuta Sakashita, Daisuke Izuhara, Kiyoshi Minoura, Mei Kumagai
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Patent number: 11921377Abstract: Provided is an optical element including: a liquid crystal cell including a first substrate, a liquid crystal layer, and a second substrate; and a quarter-wave film. The liquid crystal layer contains liquid crystal molecules twist-aligned. The liquid crystal cell includes electrodes. The electrodes are disposed to enable switching between a first state and a second state by application of voltage to the liquid crystal layer. The switching between the first state and the second state controls a polarization state of light incident on the liquid crystal cell. Circularly polarized light incident on the liquid crystal cell is converted to first linearly polarized light in the first state while converted to second linearly polarized light in the second state. Linearly polarized light incident on the liquid crystal cell is converted to first circularly polarized light in the first state while converted to second circularly polarized light in the second state.Type: GrantFiled: November 30, 2022Date of Patent: March 5, 2024Assignee: Sharp Display Technology CorporationInventors: Daisuke Minami, Hiroaki Asagi, Kiyoshi Minoura
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Patent number: 11882656Abstract: A wiring substrate includes a first conductor layer, an insulating layer formed on the first conductor layer, a second conductor layer formed on the insulating layer, a connection conductor penetrating through the insulating layer and connecting the first and second conductor layers, and a coating film formed on a surface of the first conductor layer and adhering the first conductor layer and the insulating layer. The first conductor layer includes a conductor pad in contact with the connection conductor such that the conductor pad has a surface having a first region and a second region on second conductor layer side and that surface roughness of the first region is different from surface roughness of the second region, and the conductor pad of the first conductor layer is formed such that the first region is covered by the coating film and that the second region is covered by the connection conductor.Type: GrantFiled: March 30, 2022Date of Patent: January 23, 2024Assignee: IBIDEN CO., LTD.Inventors: Takema Adachi, Daisuke Minoura
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Patent number: 11792929Abstract: A wiring substrate includes a first insulating layer, a first conductor layer, a second insulating layer, a second conductor layer, a connection conductor penetrating through the second insulating layer and connecting the first and second conductor layers, and a coating film formed on a surface of the first conductor layer such that the coating film is adhering the first conductor layer and the second insulating layer. The first conductor layer includes a conductor pad and a wiring pattern such that the conductor pad is in contact with the connection conductor and the wiring pattern is covered by the coating film, the conductor pad of the first conductor layer has a surface facing the second insulating layer and having a first surface roughness higher than a surface roughness of a surface of the wiring pattern, and the coating film has opening such that the opening is exposing the conductor pad entirely.Type: GrantFiled: January 31, 2022Date of Patent: October 17, 2023Assignee: IBIDEN CO., LTD.Inventors: Takema Adachi, Daisuke Minoura
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Patent number: 11617262Abstract: A wiring substrate includes a first insulating layer, a first conductor layer, a second insulating layer, a second conductor layer, a connection conductor, and a coating film. The first conductor layer includes a conductor pad and a wiring pattern such that the conductor pad is formed in contact with the connection conductor and that the wiring pattern is covered by the coating film, the conductor pad has a surface facing the second insulating layer and having first surface roughness higher than surface roughness of a surface of the wiring pattern, and the coating film has opening exposing a portion of the surface of the conductor pad from the coating film and having area larger than area of interface between the conductor pad and the connection conductor and that the connection conductor is formed on the portion of the surface of the conductor pad and is separated from the coating film.Type: GrantFiled: January 31, 2022Date of Patent: March 28, 2023Assignee: IBIDEN CO., LTD.Inventors: Takema Adachi, Daisuke Minoura
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Publication number: 20220338347Abstract: A wiring substrate includes a first conductor layer, an insulating layer formed on the first conductor layer, a second conductor layer formed on the insulating layer, a connection conductor penetrating through the insulating layer and connecting the first and second conductor layers, and a coating film formed on a surface of the first conductor layer and adhering the first conductor layer and the insulating layer. The first conductor layer includes a conductor pad in contact with the connection conductor such that the conductor pad has a surface having a first region and a second region on second conductor layer side and that surface roughness of the first region is different from surface roughness of the second region, and the conductor pad of the first conductor layer is formed such that the first region is covered by the coating film and that the second region is covered by the connection conductor.Type: ApplicationFiled: March 30, 2022Publication date: October 20, 2022Applicant: IBIDEN CO., LTD.Inventors: Takema ADACHI, Daisuke MINOURA
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Publication number: 20220248533Abstract: A wiring substrate includes a first insulating layer, a first conductor layer, a second insulating layer, a second conductor layer, a connection conductor penetrating through the second insulating layer and connecting the first and second conductor layers, and a coating film formed on a surface of the first conductor layer such that the coating film is adhering the first conductor layer and the second insulating layer. The first conductor layer includes a conductor pad and a wiring pattern such that the conductor pad is in contact with the connection conductor and the wiring pattern is covered by the coating film, the conductor pad of the first conductor layer has a surface facing the second insulating layer and having a first surface roughness higher than a surface roughness of a surface of the wiring pattern, and the coating film has opening such that the opening is exposing the conductor pad entirely.Type: ApplicationFiled: January 31, 2022Publication date: August 4, 2022Applicant: IBIDEN CO., LTD.Inventors: Takema ADACHI, Daisuke MINOURA
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Publication number: 20220248531Abstract: A wiring substrate includes a first insulating layer, a first conductor layer, a second insulating layer, a second conductor layer, a connection conductor, and a coating film. The first conductor layer includes a conductor pad and a wiring pattern such that the conductor pad is formed in contact with the connection conductor and that the wiring pattern is covered by the coating film, the conductor pad has a surface facing the second insulating layer and having first surface roughness higher than surface roughness of a surface of the wiring pattern, and the coating film has opening exposing a portion of the surface of the conductor pad from the coating film and having area larger than area of interface between the conductor pad and the connection conductor and that the connection conductor is formed on the portion of the surface of the conductor pad and is separated from the coating film.Type: ApplicationFiled: January 31, 2022Publication date: August 4, 2022Applicant: IBIDEN CO., LTD.Inventors: Takema ADACHI, Daisuke MINOURA
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Publication number: 20220077046Abstract: A wiring substrate includes a first conductor layer, an insulating layer on the first layer such that the insulating layer is covering the first layer, a second conductor layer on the insulating layer such that the insulating layer is formed between the first and second layers, the connection conductors penetrating through the insulating layer and connecting the first and second layers, and a coating film formed at least partially on surface of the first layer such that the film improves adhesion between the first layer and insulating layer. The first layer includes pads and wiring patterns such that the pads are in contact with the connection conductors and that the patterns have surfaces facing the insulating layer and covered by the film, and the pads have roughened surfaces facing the insulating layer and having first surface roughness that is higher than second surface roughness of the surfaces of the patterns.Type: ApplicationFiled: August 27, 2021Publication date: March 10, 2022Applicant: IBIDEN CO., LTD.Inventors: Takema ADACHI, Daisuke MINOURA
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Patent number: 9322315Abstract: A filter state detection device includes a first pressure detection part, a second pressure detection part, and a filter state determination part. The filter state determination part is configured to include an operation part and a storage part. The operation part is configured to apply Fourier transformation to each of values of first and second pressures to obtain first and second spectral intensities and/or phases at a zero frequency and first and second spectral intensities and/or phases at a predetermined frequency and configured to compare the first spectral intensity and/or phase at a zero frequency and the first spectral intensity and/or phase at the predetermined frequency as a first group against the second spectral intensity and/or phase at a zero frequency and the second spectral intensity and/or phase at the predetermined frequency as a second group to determine a state of a filter.Type: GrantFiled: March 7, 2012Date of Patent: April 26, 2016Assignee: IBIDEN CO., LTD.Inventors: Takashi Yamakawa, Yasuhiro Ishii, Daisuke Minoura
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Publication number: 20140223998Abstract: A particulate collection filter state detection device for detecting a state of a filter for collecting particulates in an exhaust gas, according to the present invention, includes first pressure detection means for detecting a first pressure produced at an upstream side of the filter on an exhaust gas flow path, second pressure detection means for detecting a second pressure produced at a downstream side of the filter on the exhaust gas flow path, and filter state determination means for determining a state of the filter, wherein the filter state determination means are composed of an operation part and a storage part, wherein values of the first and second pressures detected by the first and second pressure detection means are stored in the storage part, wherein values of the first and second pressures detected by the first and second pressure detection means are transmitted from the storage part to the operation part, and wherein a state of the filter is determined in the operation part by applying FourierType: ApplicationFiled: March 7, 2012Publication date: August 14, 2014Applicant: IBIDEN CO., LTD.Inventors: Takashi Yamakawa, Yasuhiro Ishii, Daisuke Minoura
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Publication number: 20140090460Abstract: A particulate collection filter state detection device according to the present invention includes first pressure detection means for detecting a first pressure produced at an upstream side of the filter on an exhaust gas flow path, second pressure detection means for detecting a second pressure produced at a downstream side of the filter on the exhaust gas flow path, first Fourier transformation means for applying Fourier transformation to a value of the first pressure detected by the first pressure detection means, second Fourier transformation means for applying Fourier transformation to a value of the second pressure detected by the second pressure detection means, comparison means for comparing a spectral intensity and/or a phase at a zero frequency and a spectral intensity and/or a phase at a predetermined frequency obtained by the first Fourier transformation means and a spectral intensity and/or a phase at a zero frequency and a spectral intensity and/or a phase at a predetermined frequency obtained bType: ApplicationFiled: March 7, 2012Publication date: April 3, 2014Applicant: IBIDEN CO., LTD.Inventors: Takashi Yamakawa, Yasuhiro Ishii, Daisuke Minoura
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Patent number: 8378231Abstract: A semiconductor device includes wiring boards each having an insulating board, conductor circuits and through-holes, the insulating board having top and bottom surfaces, the conductor circuits formed on the top and bottom surfaces, the through holes penetrating the insulating board and electrically connecting the conductor circuits of the top and bottom surfaces; conductor posts each having flange, head and leg portions, the flange portion having first and second surfaces and having an external diameter larger than that of the through-hole, the head portion protruding from the first surface, the leg portion protruding from the second surface; and electronic components each having an electrode formed on one or more surfaces and connected to the leg portion. The head portion is inserted until the first surface of the flange portion comes into contact with the bottom surface of the wiring board and electrically connected at an inner wall of the through-hole.Type: GrantFiled: July 27, 2009Date of Patent: February 19, 2013Assignee: Ibiden Co., Ltd.Inventors: Kiyotaka Tsukada, Toshihiro Nomura, Daisuke Minoura
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Publication number: 20100027228Abstract: A semiconductor device includes wiring boards each having an insulating board, conductor circuits and through-holes, the insulating board having top and bottom surfaces, the conductor circuits formed on the top and bottom surfaces, the through holes penetrating the insulating board and electrically connecting the conductor circuits of the top and bottom surfaces; conductor posts each having flange, head and leg portions, the flange portion having first and second surfaces and having an external diameter larger than that of the through-hole, the head portion protruding from the first surface, the leg portion protruding from the second surface; and electronic components each having an electrode formed on one or more surfaces and connected to the leg portion. The head portion is inserted until the first surface of the flange portion comes into contact with the bottom surface of the wiring board and electrically connected at an inner wall of the through-hole.Type: ApplicationFiled: July 27, 2009Publication date: February 4, 2010Applicant: IBIDEN CO., LTD.Inventors: Kiyotaka TSUKADA, Toshihiro NOMURA, Daisuke MINOURA