Patents by Inventor Daisuke Miyazaki

Daisuke Miyazaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060181667
    Abstract: An LCD (liquid-crystal display) device comprising: first and second substrates; a liquid-crystal layer formed of a liquid crystal material and sandwiched as held between the substrates; spherical spacers arranged between the substrates; and recesses on surfaces contacting the liquid-crystal layer, of the substrates; and each of the spherical spacers being placed in respective one of the recesses. A manufacturing method of the LCD device comprising: forming recesses distributed on a main face of either of the first and second substrates; and preparing a plurality of spherical spacers on said recesses.
    Type: Application
    Filed: January 25, 2006
    Publication date: August 17, 2006
    Applicant: Toshiba Matsushita Display Technology Co., Ltd.
    Inventors: Takashi Doi, Daisuke Miyazaki
  • Patent number: 7009652
    Abstract: An image input apparatus has a photoelectric converter element having a flat photosensitive surface and an image formation unit array having a plurality of image formation units arranged in an array. This image formation units individually receive light beams substantially from an identical area and focus the received light beams on different regions of the photosensitive surface of the photoelectric converter element to form images thereon.
    Type: Grant
    Filed: August 16, 2000
    Date of Patent: March 7, 2006
    Assignees: Minolta Co. Ltd, Japan Science and Technology Corporation
    Inventors: Jun Tanida, Kenji Yamada, Daisuke Miyazaki, Yoshiki Ichioka, Shigehiro Miyatake, Kouichi Ishida
  • Patent number: 6919750
    Abstract: A master DLL circuit (3) generates a first delay signal (CKD) by delaying the master clock signal by a first delay time (T0) and generates a first pulse signal (Smp) having a pulse width (T0) of the first delay time, and generates a first control signal (Scp) which is changed in accordance with the first pulse signal (Smp), and adjusts the first delay time (T0) in accordance with the first control signal (Scp). Each slave DLL circuit (D1 to Dm) delays, by a second delay time (td), a delay internal clock signal, and outputs the delayed delay internal clock signals (CK1 to CKm) which form the multiphase clock signals. Each slave DLL circuit generates a second pulse signal (Ssp) having a pulse width (td) of the second delay time, and generates a second control signal (Scp1) which is changed in accordance with the first and second pulse signals (Smp, Ssp), and adjusts the second delay time (td) in accordance with the second control signal (Scp1), thus reducing a skew value of the multiphase clock signal.
    Type: Grant
    Filed: October 15, 2003
    Date of Patent: July 19, 2005
    Assignee: Semiconductor Technology Academic Research Center
    Inventors: Shoji Kawahito, Daisuke Miyazaki
  • Patent number: 6888608
    Abstract: A improved liquid crystal display device including two substrates each having transparent electrode thereon disposed in parallel while keeping a predetermined gap by means of pillar-shaped spacers and a liquid crystal held between said first and second substrates is proposed. In the liquid crystal display device, density or volume of the number of the pillar-shaped spacers provided in the off-display area is higher than those of a density of the number of said pillar-shaped spacers provided in the display area. This change is made continuously or stepwise along areas. The spacers are preferably disposed so that a contact area between the spacer and a rubbing cloth during the rubbing process is minimized, or so that an orientation defective area caused starting from the spacer does not extend into the pixel area, or so that a plurality of spacers are disposed along a flow of liquid crystal from filling port into the gap between the first and second substrate.
    Type: Grant
    Filed: July 17, 2002
    Date of Patent: May 3, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Daisuke Miyazaki, Shoichi Kurauchi, Hitoshi Hatoh, Akiko Ueno, Teruyuki Midorikawa, Makoto Hasegawa
  • Patent number: 6756928
    Abstract: A pseudo-differential amplifier circuit 1 is constructed from two equivalent amplifiers 2 and 3 that amplify a pair of input signals without using a differential pair. This pseudo-differential amplifier circuit 1 is used in an arithmetic unit in each of the A-D converter circuits AD1 through ADm in a parallel pipeline A-D converter 10.
    Type: Grant
    Filed: November 21, 2002
    Date of Patent: June 29, 2004
    Assignee: Semiconductor Technology Academic Research Center
    Inventors: Shoji Kawahito, Daisuke Miyazaki
  • Publication number: 20040080349
    Abstract: A master DLL circuit (3) generates a first delay signal (CKD) by delaying the master clock signal by a first delay time (T0) and generates a first pulse signal (Smp) having a pulse width (T0) of the first delay time, and generates a first control signal (Scp) which is changed in accordance with the first pulse signal (Smp), and adjusts the first delay time (T0) in accordance with the first control signal (Scp). Each slave DLL circuit (D1 to Dm) delays, by a second delay time (td), a delay internal clock signal, and outputs the delayed delay internal clock signals (CK1 to CKm) which form the multiphase clock signals. Each slave DLL circuit generates a second pulse signal (Ssp) having a pulse width (td) of the second delay time, and generates a second control signal (Scp1) which is changed in accordance with the first and second pulse signals (Smp, Ssp), and adjusts the second delay time (td) in accordance with the second control signal (Scp1), thus reducing a skew value of the multiphase clock signal.
    Type: Application
    Filed: October 15, 2003
    Publication date: April 29, 2004
    Inventors: Shoji Kawahito, Daisuke Miyazaki
  • Patent number: 6700417
    Abstract: A sampling and hold circuit that can suppress voltage variation at the input terminals, which are virtual grounds, of a differential amplifier, depending on the frequency of input signals. During sampling operation, a serial circuit composed of a capacitor C1, to which a positive-side input voltage ViP is applied, and an NMOS transistor Q4, which is always turned on, is connected to an input terminal INP of a differential amplifier circuit 2. A serial circuit having the same impedance as that serial circuit and composed of a capacitor C3, to which a negative-side input voltage ViM is applied, and an NMOS transistor Q9 is also connected to the input terminal INP. A serial circuit composed of a capacitor C2, to which a negative-side input voltage ViM is applied, and an NMOS transistor Q5, which is always turned on, is connected to the other input terminal INM of a differential amplifier circuit 2.
    Type: Grant
    Filed: November 21, 2002
    Date of Patent: March 2, 2004
    Assignee: Semiconductor Technology Academic Research Center
    Inventors: Shoji Kawahito, Daisuke Miyazaki
  • Patent number: 6674500
    Abstract: A liquid crystal display device includes a pair of substrates, a liquid crystal material sandwiched between the pair of substrates, a shield area disposed on the outer periphery of a display area, and an outer edge sealing member disposed on the further outer periphery than the shield area and formed except for the liquid crystal inlet. Particularly, in this liquid crystal display device, a shield pattern comprising a resin of a predetermined thickness and a color filter thinner than the predetermined thickness coexist with each other on a plane in the shield area in the vicinity of the inlet.
    Type: Grant
    Filed: March 17, 2003
    Date of Patent: January 6, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Atsuyuki Manabe, Nobuko Fukuoka, Daisuke Miyazaki, Hitoshi Hato, Tetsuya Iizuka
  • Publication number: 20030179328
    Abstract: A liquid crystal display device includes a pair of substrates, a liquid crystal material sandwiched between the pair of substrates, a shield area disposed on the outer periphery of a display area, and an outer edge sealing member disposed on the further outer periphery than the shield area and formed except for the liquid crystal inlet. Particularly, in this liquid crystal display device, a shield pattern comprising a resin of a predetermined thickness and a color filter thinner than the predetermined thickness coexist with each other on a plane in the shield area in the vicinity of the inlet.
    Type: Application
    Filed: March 17, 2003
    Publication date: September 25, 2003
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Atsuyuki Manabe, Nobuko Fukuoka, Daisuke Miyazaki, Hitoshi Hato, Tetsuya Iizuka
  • Publication number: 20030131163
    Abstract: A disk control apparatus formats each track of a storage disk device in a short time. The disk control apparatus (1) has a cache memory (14) which stores a part of data, a management table (20) which indicates whether a track of the storage disk device (2) has been initialized to a predetermined track format, and control units (10, 12) which create the track format referring to the management table (20) when an input/output request is received from the host (3). The factory shipment format flag of this management table is set to “1” when factory formatting is executed, and the table is transferred to the disk. By this method, high-speed factory formatting is possible.
    Type: Application
    Filed: February 13, 2003
    Publication date: July 10, 2003
    Applicant: FUJITSU LIMITED
    Inventors: Atsushi Ishii, Hideo Takahashi, Tatsuya Yanagisawa, Hidefumi Kobayashi, Hideo Masuda, Rei Hirose, Daisuke Miyazaki
  • Publication number: 20030122592
    Abstract: A sampling and hold circuit that can suppress voltage variation at the input terminals, which are virtual grounds, of a differential amplifier, depending on the frequency of input signals. During sampling operation, a serial circuit composed of a capacitor C1, to which a positive-side input voltage ViP is applied, and an NMOS transistor Q4, which is always turned on, is connected to an input terminal INP of a differential amplifier circuit 2. A serial circuit having the same impedance as that serial circuit and composed of a capacitor C3, to which a negative-side input voltage ViM is applied, and an NMOS transistor Q9 is also connected to the input terminal INP. A serial circuit composed of a capacitor C2, to which a negative-side input voltage ViM is applied, and an NMOS transistor Q5, which is always turned on, is connected to the other input terminal INM of a differential amplifier circuit 2.
    Type: Application
    Filed: November 21, 2002
    Publication date: July 3, 2003
    Inventors: Shoji Kawahito, Daisuke Miyazaki
  • Publication number: 20030117308
    Abstract: A pseudo-differential amplifier circuit 1 is constructed from two equivalent amplifiers 2 and 3 that amplify a pair of input signals without using a differential pair. This pseudo-differential amplifier circuit 1 is used in an arithmetic unit in each of the A-D converter circuits AD1 through ADm in a parallel pipeline A-D converter 10.
    Type: Application
    Filed: November 21, 2002
    Publication date: June 26, 2003
    Inventors: Shoji Kawahito, Daisuke Miyazaki
  • Patent number: 6570639
    Abstract: A liquid crystal display device includes a pair of substrates, a liquid crystal material sandwiched between the pair of substrates, a shield area disposed on the outer periphery of a display area, and an outer edge sealing member disposed on the further outer periphery than the shield area and formed except for the liquid crystal inlet. Particularly, in this liquid crystal display device, a shield pattern comprising a resin of a predetermined thickness and a color filter thinner than the predetermined thickness coexist with each other on a plane in the shield area in the vicinity of the inlet.
    Type: Grant
    Filed: September 1, 2000
    Date of Patent: May 27, 2003
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Atsuyuki Manabe, Nobuko Fukuoka, Daisuke Miyazaki, Hitoshi Hato, Tetsuya Iizuka
  • Publication number: 20020171800
    Abstract: A improved liquid crystal display device including two substrates each having transparent electrode thereon disposed in parallel while keeping a predetermined gap by means of pillar-shaped spacers and a liquid crystal held between said first and second substrates is proposed. In the liquid crystal display device, density or volume of the number of the pillar-shaped spacers provided in the off-display area is higher than those of a density of the number of said pillar-shaped spacers provided in the display area. This change is made continuously or stepwise along areas. The spacers are preferably disposed so that a contact area between the spacer and a rubbing cloth during the rubbing process is minimized, or so that an orientation defective area caused starting from the spacer does not extend into the pixel area, or so that a plurality of spacers are disposed along a flow of liquid crystal from filling port into the gap between the first and second substrate.
    Type: Application
    Filed: July 17, 2002
    Publication date: November 21, 2002
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Daisuke Miyazaki, Shoichi Kurauchi, Hitoshi Hatoh, Akiko Ueno, Teruyuki Midorikawa, Makoto Hasegawa
  • Patent number: 6445437
    Abstract: A improved liquid crystal display device including two substrates each having transparent electrode thereon disposed in parallel while keeping a predetermined gap by means of pillar-shaped spacers and a liquid crystal held between said first and second substrates is proposed. In the liquid crystal display device, density or volume of the number of the pillar-shaped spacers provided in the off-display area is higher than those of a density of the number of said pillar-shaped spacers provided in the display area. This change is made continuously or stepwise along areas. The spacers are preferably disposed so that a contact area between the spacer and a rubbing cloth during the rubbing process is minimized, or so that an orientation defective area caused starting from the spacer does not extend into the pixel area, or so that a plurality of spacers are disposed along a flow of liquid crystal from filling port into the gap between the first and second substrate.
    Type: Grant
    Filed: September 2, 1999
    Date of Patent: September 3, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Daisuke Miyazaki, Shoichi Kurauchi, Hitoshi Hatoh, Akiko Ueno, Teruyuki Midorikawa, Makoto Hasegawa
  • Patent number: 6323921
    Abstract: The color filter substrate used for the liquid crystal display device comprises a substrate portion, a color filter portion composed of colored layers of plural colors disposed on the substrate portion, a first spacer portion such that colored layers of at least two different colors of the colored layers of the plural colors are stacked on the substrate portion and one colored layer of the stacked colored layers and the colored layer of the same color as that of the one colored layer of the color filter portion are continuous with each other, and a second spacer portion such that the colored layers of at least two different colors of the colored layers of the plural colors are stacked on the substrate portion and all of the stacked colored layers are discontinuous with respect to any one of the colored layers constituting the color filter portion.
    Type: Grant
    Filed: September 5, 2000
    Date of Patent: November 27, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shoichi Kurauchi, Daisuke Miyazaki, Hitoshi Hatoh, Teruyuki Midorikawa
  • Patent number: 6287733
    Abstract: A liquid crystal display element includes a pillar-shaped spacer as a stack of a plurality of color layers, which exists on either an active matrix substrate or an opposite substrate facing to the former substrate. An impurity concentration and an impurity elution quantity of the color layer closest to a switching element among the color layers constituting the pillar-shaped spacer are made lowest among the plurality of color layers, or a bridging density of a resin is made highest among the color layers, thereby restraining an influence of the impurities upon the switching element and enhancing a display quality and a yield. Damages to contact areas when the active matrix substrate is disposed facing to the opposite substrate are reduced by making a hardness of the farthest layer from a surface of a substrate on which the pillar-shaped spacer is disposed lowest among the color layers.
    Type: Grant
    Filed: May 14, 1998
    Date of Patent: September 11, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Daisuke Miyazaki, Shoichi Kurauchi, Hitoshi Hatoh, Teruyuki Midorikawa
  • Patent number: 6281955
    Abstract: A color filter is disposed on a switching element array substrate. The color filter is composed of a plurality of kinds of color elements and an aperture. Two of the filter elements are overlapped at one end portion thereof. Each of the filter elements is covered with a pixel electrode. The pixel electrode is connected to the switching element through the aperture. This structure reduces electric coupling between the pixel electrode and the gate and signal lines. Optimum conditions among the overlapped width, and the aperture diameter and location are set to prevent the filter element from peeling off the array substrate so that the production yield can be significantly improved.
    Type: Grant
    Filed: May 20, 1998
    Date of Patent: August 28, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Teruyuki Midorikawa, Yasuharu Tanaka, Masumi Manabe, Minako Kurosaki, Muneharu Akiyoshi, Daisuke Miyazaki, Hitoshi Hatoh
  • Patent number: 6238754
    Abstract: Disclosed is a liquid crystal display device, comprising two substrates each having an alignment film, a sealing member arranged in the outer peripheries of the two substrates to permit the outer peripheries of these two substrates, which are arranged such that the alignment films of these two substrates face each other, to be bonded to each other except a liquid crystal filling port, a spacer for keeping the two substrates a predetermined distance apart from each other, a liquid crystal layer formed by filling a liquid crystal material through the liquid crystal filling port into the clearance between the two substrates, and an end-sealing material for sealing the liquid crystal filling port, wherein total amounts of an alkyl acid, phenyl carboxylic acid or a phenyl carboxylic acid derivative, phenylene dicarboxylic acid or a phenylene dicarboxylic acid derivative, an alkyl amine, aniline or an aniline derivative, phenylene diamine or a phenylene diamine derivative, phenyleneamine carboxylic acid or a phenyl
    Type: Grant
    Filed: July 1, 1999
    Date of Patent: May 29, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kiyoshi Shohara, Daisuke Miyazaki, Natsuko Maya, Muneharu Akiyoshi, Atsuyuki Manabe, Masumi Manabe, Nobuko Fukuoka, Kisako Ninomiya, Hitoshi Hatoh
  • Patent number: 6147729
    Abstract: A color filter substrate and a liquid crystal display device having high opening ratio and capable of preventing unsatisfactory display as far as possible are provided.
    Type: Grant
    Filed: October 28, 1997
    Date of Patent: November 14, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shoichi Kurauchi, Daisuke Miyazaki, Hitoshi Hatoh, Teruyuki Midorikawa