Patents by Inventor Daisuke Shichinohe

Daisuke Shichinohe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5373199
    Abstract: A transistor (2P) permitted to select whether to operate as a common-source circuit or as a source follower type circuit is connected in series with a transistor (1P) operating as a common-source circuit. This selection is achieved by the control of a switching circuit (SP). Selection is permitted to be made whether to oscillate the amplitude of an output potential over the full range or to limit the amplitude by the amount of a threshold level of the transistor. An MOS transistor output circuit is provided which limits or unlimits the amplitude of the output potential for reducing undesired radiation, malfunctions due to noises and heat generated and for high-speed operation of logic circuits. (FIG.
    Type: Grant
    Filed: December 17, 1992
    Date of Patent: December 13, 1994
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Daisuke Shichinohe, Kenji Nakao
  • Patent number: 5343099
    Abstract: An output device is disclosed for restraining a ringing caused when the operation of a semiconductor integrated circuit device is speeded up. This output device includes first, second and third N channel transistors. The first N channel transistor has its gate electrode connected to receive an input signal, its drain electrode connected to an output terminal, and its source electrode connected to the drain electrodes of the second and third N channel transistors. The second N channel transistor has its gate electrode and drain electrode connected to each other and its source electrode grounded. The third N channel transistor has an on resistance value matching with the characteristic impedance of a load connected to the output terminal and has its source electrode grounded.
    Type: Grant
    Filed: October 13, 1992
    Date of Patent: August 30, 1994
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Daisuke Shichinohe
  • Patent number: 5298804
    Abstract: An output circuit K11 including a transistor 1N controlled by the logical level of an input terminal 11 and transistor 2N controlled by the logical level of an output terminal 12 is connected to an output circuit K22 including an inverter 1G and a transmission gate composed of transistors 3N and 4P, in parallel between power sources V.sub.DD and V.sub.SS. When an output potential V.sub.O is around the potential V.sub.DD, the output circuit K11 having a large current drive capability drives an output current I.sub.O. When the output potential V.sub.O is around the potential V.sub.SS, the output circuit K22 having a large on resistance drives the output current I.sub.O.
    Type: Grant
    Filed: November 5, 1991
    Date of Patent: March 29, 1994
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Daisuke Shichinohe
  • Patent number: 5192879
    Abstract: An MOS transistor output circuit includes a parallel combination of first and second circuits including transistors of different output characteristics in either or both of paths between an output terminal and a point of ground potential and the output terminal and a V.sub.DD voltage supply terminal. Upon transition of an input signal level, both first and second circuit become conductive so that the output circuit exhibits a large current driving capability which permits the output voltage to rapidly change until it approaches a predetermined level. When the output voltage reaches the predetermined level, one of the first and second circuits is turned off to thereby prevent the output circuit ON-resistance R.sub.ON from becoming excessively small, which, in turn, limits the circuit driving capability, whereby ringing in the output voltage is effectively prevented.
    Type: Grant
    Filed: September 25, 1991
    Date of Patent: March 9, 1993
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kazuo Aoki, Daisuke Shichinohe
  • Patent number: 4914428
    Abstract: A digital remote control apparatus for transmitting digital instruction signals to a controllable apparatus includes a transmitter for transmitting a coded digital instruction signal composed of a sequence of synchronization pulses having a predetermined period and data pulses each inserted between successive synchronization pulses at predetermined positions therein dependent upon whether the data pulses represents a "0" bit or a "1" bit. The receiving apparatus distinguishes between "0" and "1" bits by detecting the length of an interval between the leading edge of a synchronization pulse and the leading edge of an adjacent data pulse and determines the existence of noise if more than one data pulse is detected between successive synchronzation pulses.
    Type: Grant
    Filed: May 28, 1987
    Date of Patent: April 3, 1990
    Assignee: Mitsubishi Denki Kaushiki
    Inventors: Hiroshi Kobayashi, Shinji Suda, Katsunobu Hongo, Daisuke Shichinohe, Masako Hiroma
  • Patent number: 4814741
    Abstract: A digital remote control device for use in a transmitter capable of transmitting an end code following each transmission code, which includes a counting circuit for counting the number of transmission operations performed by pressing a key or keys on the transmitter; and an end pulse changing circuit for changing a configuration of the end code such that the configuration corresponds to a count value counted by the counting circuit.
    Type: Grant
    Filed: April 28, 1987
    Date of Patent: March 21, 1989
    Assignee: Mitsubishi Denki K.K.
    Inventors: Katsunobu Hongo, Shinji Suda, Hiroshi Kobayashi, Daisuke Shichinohe