Patents by Inventor Daizou Andou

Daizou Andou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6748652
    Abstract: Through holes formed in an electrical insulating substrate having adhesive layers on its both surfaces are filled with a conductor. Then, supporting bases having wiring layers with a predetermined pattern are laminated on both the surfaces of the electrical insulating substrate, which are then heated and pressurized. After that, the supporting bases are removed, thus obtaining a circuit board in which the wiring layers have been embedded in the adhesive layers. The conductor within the through holes are compressed sufficiently, thus forming minute via holes with high reliability.
    Type: Grant
    Filed: March 26, 2003
    Date of Patent: June 15, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Daizou Andou, Toshio Sugawa, Tadashi Nakamura, Hideki Higashitani, Masahide Tsukamoto
  • Publication number: 20030180512
    Abstract: Through holes formed in an electrical insulating substrate having adhesive layers on its both surfaces are filled with a conductor. Then, supporting bases having wiring layers with a predetermined pattern are laminated on both the surfaces of the electrical insulating substrate, which are then heated and pressurized. After that, the supporting bases are removed, thus obtaining a circuit board in which the wiring layers have been embedded in the adhesive layers. The conductor within the through holes are compressed sufficiently, thus forming minute via holes with high reliability.
    Type: Application
    Filed: March 26, 2003
    Publication date: September 25, 2003
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Daizou Andou, Toshio Sugawa, Tadashi Nakamura, Hideki Higashitani, Masahide Tsukamoto
  • Patent number: 6565954
    Abstract: Through holes formed in an electrical insulating substrate having adhesive layers on its both surfaces are filled with a conductor. Then, supporting bases having wiring layers with a predetermined pattern are laminated on both the surfaces of the electrical insulating substrate, which are then heated and pressurized. After that, the supporting bases are removed, thus obtaining a circuit board in which the wiring layers have been embedded in the adhesive layers. The conductor within the through holes are compressed sufficiently, thus forming minute via holes with high reliability.
    Type: Grant
    Filed: December 1, 2000
    Date of Patent: May 20, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Daizou Andou, Toshio Sugawa, Tadashi Nakamura, Hideki Higashitani, Masahide Tsukamoto
  • Patent number: 6532651
    Abstract: Through holes formed in an electrical insulating substrate having adhesive layers on its both surfaces are filled with a conductor. Then, supporting bases having wiring layers with a predetermined pattern are laminated on both the surfaces of the electrical insulating substrate, which are then heated and pressurized. After that, the supporting bases are removed, thus obtaining a circuit board in which the wiring layers have been embedded in the adhesive layers. The conductor within the through holes are compressed sufficiently, thus forming minute via holes with high reliability.
    Type: Grant
    Filed: February 15, 2000
    Date of Patent: March 18, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Daizou Andou, Toshio Sugawa, Tadashi Nakamura, Hideki Higashitani, Masahide Tsukamoto
  • Publication number: 20010005545
    Abstract: Through holes formed in an electrical insulating substrate having adhesive layers on its both surfaces are filled with a conductor. Then, supporting bases having wiring layers with a predetermined pattern are laminated on both the surfaces of the electrical insulating substrate, which are then heated and pressurized. After that, the supporting bases are removed, thus obtaining a circuit board in which the wiring layers have been embedded in the adhesive layers. The conductor within the through holes are compressed sufficiently, thus forming minute via holes with high reliability.
    Type: Application
    Filed: December 1, 2000
    Publication date: June 28, 2001
    Inventors: Daizou Andou, Toshio Sugawa, Tadashi Nakamura, Hideki Higashitani, Masahide Tsukamoto
  • Patent number: 6197407
    Abstract: Through holes formed in an electrical insulating substrate having adhesive layers on its both surfaces are filled with a conductor. Then, supporting bases having wiring layers with a predetermined pattern are laminated on both the surfaces of the electrical insulating substrate, which are then heated and pressurized. After that, the supporting bases are removed, thus obtaining a circuit board in which the wiring layers have been embedded in the adhesive layers. The conductor within the through holes are compressed sufficiently, thus forming minute via holes with high reliability.
    Type: Grant
    Filed: May 4, 1999
    Date of Patent: March 6, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Daizou Andou, Toshio Sugawa, Tadashi Nakamura, Hideki Higashitani, Masahide Tsukamoto